[PATCH] [mips] Optimize code generation for 64-bit variable shift instructions.

[Vasileios Kalintiris]

Hi dsanders,

The 64-bit version of the variable shift instructions uses the
shift_rotate_reg class which uses a GPR32Opnd to specify the variable
shift amount. With this patch we avoid the generation of a redundant
SLL instruction for the variable shift instructions in 64-bit targets.

http://reviews.llvm.org/D7413

Files:
  lib/Target/Mips/Mips64InstrInfo.td
  test/CodeGen/Mips/llvm-ir/ashr.ll
  test/CodeGen/Mips/llvm-ir/lshr.ll
  test/CodeGen/Mips/llvm-ir/shl.ll
  test/CodeGen/Mips/mips64shift.ll

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