[PATCH] [ARM] Fix subtarget feature set truncation when using .cpu directive

[Bradley Smith]

When using the .cpu directive with the integrated assembler on ARM, various subtarget features are getting incorrectly disabled. This is caused by storing the 64-bit feature bitset in a 32-bit variable, causing the top half of the available feature set to be discarded.

REPOSITORY
  rL LLVM

http://reviews.llvm.org/D7408

Files:
  lib/Target/ARM/AsmParser/ARMAsmParser.cpp
  test/MC/ARM/cpu-test.s

Index: lib/Target/ARM/AsmParser/ARMAsmParser.cpp
===================================================================
--- lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -9182,7 +9182,7 @@
   // see: http://llvm.org/bugs/show_bug.cgi?id=20757
   STI.InitMCProcessorInfo(CPU, "");
   STI.InitCPUSchedModel(CPU);
-  unsigned FB = ComputeAvailableFeatures(STI.getFeatureBits());
+  uint64_t FB = ComputeAvailableFeatures(STI.getFeatureBits());
   setAvailableFeatures(FB);
 
   return false;
Index: test/MC/ARM/cpu-test.s
===================================================================
--- test/MC/ARM/cpu-test.s
+++ test/MC/ARM/cpu-test.s
@@ -11,3 +11,7 @@
 dsb
 // CHECK-ERROR: error: Unknown CPU name
 .cpu foobar
+// CHECK: .cpu cortex-m3
+.cpu cortex-m3
+// CHECK: sub sp, #16
+sub sp,#16

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