[PATCH] merge consecutive 16-byte loads into one 32-byte load (PR22329)

[Sanjay Patel]

Hi delena, hfinkel, mkuper, RKSimon,

This patch detects consecutive loads using the existing EltsFromConsecutiveLoads() logic. This fixes:
http://llvm.org/bugs/show_bug.cgi?id=22329

This patch effectively reverts the tablegen additions of D6492 / http://reviews.llvm.org/rL224344...which in hindsight were a horrible hack. :)

The test cases that were added with that patch are simply modified to load from varying offsets of a base pointer. These loads did not match the existing tablegen patterns.

A happy side effect of doing this optimization earlier is that we can now fold the load into a math op where possible; this is shown in some of the updated checks in the test file.

http://reviews.llvm.org/D7303

Files:
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86InstrSSE.td
  test/CodeGen/X86/unaligned-32-byte-memops.ll

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