[PATCH] Change more of the guts of CodeGenRegister's RegUnit tracking to be based on bit vectors.

[Owen Anderson]

Hi chandlerc,

This is a continuation of my prior work to move some of the inner workings for CodeGenRegister to use bit vectors when computing about register units.  This is highly beneficial to TableGen runtime on targets with large, dense register files.  This patch represents a ~40% runtime reduction over and above my earlier improvement on a stress test of this case.

REPOSITORY
  rL LLVM

http://reviews.llvm.org/D7301

Files:
  utils/TableGen/CodeGenRegisters.cpp
  utils/TableGen/CodeGenRegisters.h
  utils/TableGen/RegisterInfoEmitter.cpp

EMAIL PREFERENCES
  http://reviews.llvm.org/settings/panel/emailpreferences/
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D7301.19048.patch
Type: text/x-patch
Size: 12018 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20150130/3fc29f5b/attachment.bin>