[PATCH] [mips][ias] Make immediate zero synonymous with $zero when parsing registers.

[Toma Tabacu]

I'm not sure if we should do this.
This patch would make us accept very strange instructions, such as "add 0, $4, $4", and it does not address the root of the issue, which is the IAS' lack of a BNE+Imm macro instruction.
GAS has such a macro, so it doesn't complain about Ed's use case  (and also accepts any other immediates).

If Ed thinks it would be useful for him to have his particular use case fixed sooner rather than later, then LGTM with the inlined changes.
Otherwise, I think doing a proper implementation of the BNE+Imm macro would be best (which we should do at some point either way).

Also, adding some FIXME's to the source code which mention the BNE+Imm macro would be useful.


================
Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:898-900
@@ +897,5 @@
+    // As another special case, immediate zero is also register zero.
+    // FIXME: We ought to handle the GPR64 case properly but MipsOperand
+    //        doesn't know the subtarget and the assembler doesn't need
+    //        that much precision anyway.
+    if (isConstantImm() && getConstantImm() == 0)
----------------
Actually, I believe you can do this because you have access to the MipsAsmParser, so you can call AsmParser.isGP64bit().

================
Comment at: test/MC/Mips/zero.s:2
@@ +1,3 @@
+// RUN: llvm-mc -arch=mips -show-encoding %s -o - | FileCheck %s
+
+	.text
----------------
Mention that this test is for PR22389.

================
Comment at: test/MC/Mips/zero.s:6-7
@@ +5,3 @@
+	bne $2, $zero, foo  # CHECK: bnez $2, foo # encoding: [0x14,0x40,A,A]
+	bne $2, 0, foo      # CHECK: bnez $2, foo # encoding: [0x14,0x40,A,A]
+foo:
----------------
Add the example from the Bugzilla ticket (bne $2, 0x0, foo).

http://reviews.llvm.org/D7295

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