[PATCH] Implement the vpopcnt instructions for POWER8

hfinkel at anl.gov hfinkel at anl.gov
Fri Jan 30 04:41:33 PST 2015


This look pretty good, a few minor things below...

You're missing the disassembler tests (test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt).


================
Comment at: lib/Target/PowerPC/PPC.td:323
@@ -319,3 +322,3 @@
                   [DirectivePwr8, FeatureAltivec, FeatureVSX, FeatureP8Vector,
                    FeatureMFOCRF, FeatureFCPSGN, FeatureFSqrt, FeatureFRE,
                    FeatureFRES, FeatureFRSQRTE, FeatureFRSQRTES,
----------------
Don't you need to add FeatureP8Altivec here too?

================
Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:405
@@ +404,3 @@
+      // Vector popcnt instructions introduced in P8
+      if (Subtarget.hasP8Altivec()) {
+        setOperationAction(ISD::CTPOP, VT, Legal);
----------------
We don't need the { } here, please remove them (this is the general LLVM style preference).

================
Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:604
@@ +603,3 @@
+
+    if (Subtarget.hasP8Altivec()) {
+      addRegisterClass(MVT::v2i64, &PPC::VRRCRegClass);
----------------
Same here (no { } ).

================
Comment at: test/CodeGen/PowerPC/vec_popcnt.ll:16
@@ +15,3 @@
+; CHECK: @test_v16i8_v2i64
+; CHECK: vpopcntb
+; CHECK: blr
----------------
For all of these tests, please check the register numbers on the vpopcnt* instructions. They're fixed by the calling convention, and specifically, I want to make sure that there are no extra moves being generated around them.

http://reviews.llvm.org/D7270

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