[PATCH] [X86][SSE] Shuffle mask decode support for zero extend, scalar float/double moves and integer load instructions

[Simon Pilgrim]

Thanks Quentin, I've updated the comments in the patch to explain that the SrcVT type represents the whole register, not just the lower elements that will be zero extended in the DstVT.


REPOSITORY
  rL LLVM

http://reviews.llvm.org/D7228

Files:
  lib/Target/X86/InstPrinter/X86InstComments.cpp
  lib/Target/X86/Utils/X86ShuffleDecode.cpp
  lib/Target/X86/Utils/X86ShuffleDecode.h
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/vector-shuffle-128-v16.ll
  test/CodeGen/X86/vector-shuffle-128-v2.ll
  test/CodeGen/X86/vector-shuffle-128-v4.ll
  test/CodeGen/X86/vector-shuffle-128-v8.ll
  test/CodeGen/X86/vector-shuffle-256-v4.ll
  test/CodeGen/X86/vector-shuffle-256-v8.ll

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