[llvm] r227483 - R600/SI: Add subtarget feature for if f32 fma is fast
Matt Arsenault
Matthew.Arsenault at amd.com
Thu Jan 29 11:34:26 PST 2015
Author: arsenm
Date: Thu Jan 29 13:34:25 2015
New Revision: 227483
URL: http://llvm.org/viewvc/llvm-project?rev=227483&view=rev
Log:
R600/SI: Add subtarget feature for if f32 fma is fast
Modified:
llvm/trunk/lib/Target/R600/AMDGPU.td
llvm/trunk/lib/Target/R600/AMDGPUSubtarget.cpp
llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h
llvm/trunk/lib/Target/R600/Processors.td
llvm/trunk/lib/Target/R600/SIISelLowering.cpp
Modified: llvm/trunk/lib/Target/R600/AMDGPU.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPU.td?rev=227483&r1=227482&r2=227483&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPU.td (original)
+++ llvm/trunk/lib/Target/R600/AMDGPU.td Thu Jan 29 13:34:25 2015
@@ -48,6 +48,12 @@ def FeatureFP64Denormals : SubtargetFeat
"Enable double precision denormal handling",
[FeatureFP64]>;
+def FeatureFastFMAF32 : SubtargetFeature<"fast-fmaf",
+ "FastFMAF32",
+ "true",
+ "Assuming f32 fma is at least as fast as mul + add",
+ []>;
+
// Some instructions do not support denormals despite this flag. Using
// fp32 denormals also causes instructions to run at the double
// precision rate for the device.
Modified: llvm/trunk/lib/Target/R600/AMDGPUSubtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUSubtarget.cpp?rev=227483&r1=227482&r2=227483&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUSubtarget.cpp (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUSubtarget.cpp Thu Jan 29 13:34:25 2015
@@ -65,7 +65,8 @@ AMDGPUSubtarget::AMDGPUSubtarget(StringR
: AMDGPUGenSubtargetInfo(TT, GPU, FS), DevName(GPU), Is64bit(false),
DumpCode(false), R600ALUInst(false), HasVertexCache(false),
TexVTXClauseSize(0), Gen(AMDGPUSubtarget::R600), FP64(false),
- FP64Denormals(false), FP32Denormals(false), CaymanISA(false),
+ FP64Denormals(false), FP32Denormals(false),
+ FastFMAF32(false), CaymanISA(false),
FlatAddressSpace(false), EnableIRStructurizer(true),
EnablePromoteAlloca(false), EnableIfCvt(true),
EnableLoadStoreOpt(false), WavefrontSize(0), CFALUBug(false), LocalMemorySize(0),
Modified: llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h?rev=227483&r1=227482&r2=227483&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUSubtarget.h Thu Jan 29 13:34:25 2015
@@ -55,6 +55,7 @@ private:
bool FP64;
bool FP64Denormals;
bool FP32Denormals;
+ bool FastFMAF32;
bool CaymanISA;
bool FlatAddressSpace;
bool EnableIRStructurizer;
@@ -127,6 +128,10 @@ public:
return FP64Denormals;
}
+ bool hasFastFMAF32() const {
+ return FastFMAF32;
+ }
+
bool hasFlatAddressSpace() const {
return FlatAddressSpace;
}
Modified: llvm/trunk/lib/Target/R600/Processors.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/Processors.td?rev=227483&r1=227482&r2=227483&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/Processors.td (original)
+++ llvm/trunk/lib/Target/R600/Processors.td Thu Jan 29 13:34:25 2015
@@ -83,9 +83,13 @@ def : Proc<"cayman", R600_VLIW4_Itin
// Southern Islands
//===----------------------------------------------------------------------===//
-def : ProcessorModel<"SI", SIFullSpeedModel, [FeatureSouthernIslands]>;
-
-def : ProcessorModel<"tahiti", SIFullSpeedModel, [FeatureSouthernIslands]>;
+def : ProcessorModel<"SI", SIFullSpeedModel,
+ [FeatureSouthernIslands, FeatureFastFMAF32]
+>;
+
+def : ProcessorModel<"tahiti", SIFullSpeedModel,
+ [FeatureSouthernIslands, FeatureFastFMAF32]
+>;
def : ProcessorModel<"pitcairn", SIQuarterSpeedModel, [FeatureSouthernIslands]>;
@@ -105,7 +109,9 @@ def : ProcessorModel<"kabini", SIQua
def : ProcessorModel<"kaveri", SIQuarterSpeedModel, [FeatureSeaIslands]>;
-def : ProcessorModel<"hawaii", SIFullSpeedModel, [FeatureSeaIslands]>;
+def : ProcessorModel<"hawaii", SIFullSpeedModel,
+ [FeatureSeaIslands, FeatureFastFMAF32]
+>;
def : ProcessorModel<"mullins", SIQuarterSpeedModel, [FeatureSeaIslands]>;
Modified: llvm/trunk/lib/Target/R600/SIISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIISelLowering.cpp?rev=227483&r1=227482&r2=227483&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/R600/SIISelLowering.cpp Thu Jan 29 13:34:25 2015
@@ -655,7 +655,7 @@ bool SITargetLowering::isFMAFasterThanFM
switch (VT.getSimpleVT().SimpleTy) {
case MVT::f32:
- return false; /* There is V_MAD_F32 for f32 */
+ return Subtarget->hasFastFMAF32();
case MVT::f64:
return true;
default:
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