[PATCH] [X86][SSE] psrl(w/d/q) and psll(w/d/q) bit shifts for SSE2
Simon Pilgrim
llvm-dev at redking.me.uk
Thu Jan 29 09:00:14 PST 2015
It'd be great if you want to have a go at improving this - it does reek of being able to be reduced further but so far I've failed to find the right predicate magic.
The only other thing that I've thought of is adding all_of / any_of / none_of range tests to the (Small)BitVector classes to tidyup those zeroable tests, which are becoming more common in the X86 shuffle code now.
BTW - I've just put up a patch (http://reviews.llvm.org/D7256) which fixes the combine-or.ll issue in conjunction with this patch.
REPOSITORY
rL LLVM
http://reviews.llvm.org/D6649
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