[llvm] r227214 - R600/SI: Enable all tests that pass on VI without changes
Marek Olsak
marek.olsak at amd.com
Tue Jan 27 09:27:19 PST 2015
Author: mareko
Date: Tue Jan 27 11:27:15 2015
New Revision: 227214
URL: http://llvm.org/viewvc/llvm-project?rev=227214&view=rev
Log:
R600/SI: Enable all tests that pass on VI without changes
Modified:
llvm/trunk/test/CodeGen/R600/128bit-kernel-args.ll
llvm/trunk/test/CodeGen/R600/32-bit-local-address-space.ll
llvm/trunk/test/CodeGen/R600/add-debug.ll
llvm/trunk/test/CodeGen/R600/add.ll
llvm/trunk/test/CodeGen/R600/address-space.ll
llvm/trunk/test/CodeGen/R600/and.ll
llvm/trunk/test/CodeGen/R600/anyext.ll
llvm/trunk/test/CodeGen/R600/atomic_load_add.ll
llvm/trunk/test/CodeGen/R600/atomic_load_sub.ll
llvm/trunk/test/CodeGen/R600/basic-branch.ll
llvm/trunk/test/CodeGen/R600/basic-loop.ll
llvm/trunk/test/CodeGen/R600/bfi_int.ll
llvm/trunk/test/CodeGen/R600/bitcast.ll
llvm/trunk/test/CodeGen/R600/bswap.ll
llvm/trunk/test/CodeGen/R600/build_vector.ll
llvm/trunk/test/CodeGen/R600/call.ll
llvm/trunk/test/CodeGen/R600/concat_vectors.ll
llvm/trunk/test/CodeGen/R600/copy-illegal-type.ll
llvm/trunk/test/CodeGen/R600/copy-to-reg.ll
llvm/trunk/test/CodeGen/R600/ctlz_zero_undef.ll
llvm/trunk/test/CodeGen/R600/cttz-ctlz.ll
llvm/trunk/test/CodeGen/R600/cttz_zero_undef.ll
llvm/trunk/test/CodeGen/R600/cvt_f32_ubyte.ll
llvm/trunk/test/CodeGen/R600/cvt_flr_i32_f32.ll
llvm/trunk/test/CodeGen/R600/cvt_rpi_i32_f32.ll
llvm/trunk/test/CodeGen/R600/default-fp-mode.ll
llvm/trunk/test/CodeGen/R600/ds_read2_offset_order.ll
llvm/trunk/test/CodeGen/R600/elf.ll
llvm/trunk/test/CodeGen/R600/empty-function.ll
llvm/trunk/test/CodeGen/R600/extload.ll
llvm/trunk/test/CodeGen/R600/extract_vector_elt_i16.ll
llvm/trunk/test/CodeGen/R600/fadd.ll
llvm/trunk/test/CodeGen/R600/fadd64.ll
llvm/trunk/test/CodeGen/R600/fceil.ll
llvm/trunk/test/CodeGen/R600/fcmp64.ll
llvm/trunk/test/CodeGen/R600/fconst64.ll
llvm/trunk/test/CodeGen/R600/fdiv.ll
llvm/trunk/test/CodeGen/R600/fdiv64.ll
llvm/trunk/test/CodeGen/R600/ffloor.ll
llvm/trunk/test/CodeGen/R600/flat-address-space.ll
llvm/trunk/test/CodeGen/R600/fma.f64.ll
llvm/trunk/test/CodeGen/R600/fmax3.ll
llvm/trunk/test/CodeGen/R600/fmaxnum.f64.ll
llvm/trunk/test/CodeGen/R600/fmaxnum.ll
llvm/trunk/test/CodeGen/R600/fmin3.ll
llvm/trunk/test/CodeGen/R600/fminnum.f64.ll
llvm/trunk/test/CodeGen/R600/fminnum.ll
llvm/trunk/test/CodeGen/R600/fmul.ll
llvm/trunk/test/CodeGen/R600/fmul64.ll
llvm/trunk/test/CodeGen/R600/fnearbyint.ll
llvm/trunk/test/CodeGen/R600/fneg-fabs.f64.ll
llvm/trunk/test/CodeGen/R600/fneg-fabs.ll
llvm/trunk/test/CodeGen/R600/fp-classify.ll
llvm/trunk/test/CodeGen/R600/fp16_to_fp.ll
llvm/trunk/test/CodeGen/R600/fp32_to_fp16.ll
llvm/trunk/test/CodeGen/R600/fp_to_sint.ll
llvm/trunk/test/CodeGen/R600/fp_to_uint.ll
llvm/trunk/test/CodeGen/R600/fpext.ll
llvm/trunk/test/CodeGen/R600/fptrunc.ll
llvm/trunk/test/CodeGen/R600/fsqrt.ll
llvm/trunk/test/CodeGen/R600/fsub.ll
llvm/trunk/test/CodeGen/R600/fsub64.ll
llvm/trunk/test/CodeGen/R600/ftrunc.ll
llvm/trunk/test/CodeGen/R600/global-directive.ll
llvm/trunk/test/CodeGen/R600/global-extload-i1.ll
llvm/trunk/test/CodeGen/R600/global-extload-i16.ll
llvm/trunk/test/CodeGen/R600/global-extload-i32.ll
llvm/trunk/test/CodeGen/R600/global-extload-i8.ll
llvm/trunk/test/CodeGen/R600/global-zero-initializer.ll
llvm/trunk/test/CodeGen/R600/half.ll
llvm/trunk/test/CodeGen/R600/i1-copy-implicit-def.ll
llvm/trunk/test/CodeGen/R600/i1-copy-phi.ll
llvm/trunk/test/CodeGen/R600/icmp64.ll
llvm/trunk/test/CodeGen/R600/indirect-addressing-si.ll
llvm/trunk/test/CodeGen/R600/indirect-private-64.ll
llvm/trunk/test/CodeGen/R600/infinite-loop.ll
llvm/trunk/test/CodeGen/R600/inline-asm.ll
llvm/trunk/test/CodeGen/R600/inline-calls.ll
llvm/trunk/test/CodeGen/R600/insert_subreg.ll
llvm/trunk/test/CodeGen/R600/insert_vector_elt.ll
llvm/trunk/test/CodeGen/R600/large-alloca.ll
llvm/trunk/test/CodeGen/R600/large-constant-initializer.ll
llvm/trunk/test/CodeGen/R600/lds-initializer.ll
llvm/trunk/test/CodeGen/R600/lds-zero-initializer.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.abs.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfe.u32.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfi.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfm.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.brev.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.clamp.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.cvt_f32_ubyte.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.fract.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.imad24.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.imax.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.imin.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.imul24.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.kill.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.ldexp.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.rcp.f64.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.rcp.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.rsq.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.trig_preop.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.trunc.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.umax.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.umin.ll
llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.umul24.ll
llvm/trunk/test/CodeGen/R600/llvm.SI.fs.interp.constant.ll
llvm/trunk/test/CodeGen/R600/llvm.SI.gather4.ll
llvm/trunk/test/CodeGen/R600/llvm.SI.getlod.ll
llvm/trunk/test/CodeGen/R600/llvm.SI.image.ll
llvm/trunk/test/CodeGen/R600/llvm.SI.image.sample.ll
llvm/trunk/test/CodeGen/R600/llvm.SI.image.sample.o.ll
llvm/trunk/test/CodeGen/R600/llvm.SI.imageload.ll
llvm/trunk/test/CodeGen/R600/llvm.SI.load.dword.ll
llvm/trunk/test/CodeGen/R600/llvm.SI.resinfo.ll
llvm/trunk/test/CodeGen/R600/llvm.SI.sample-masked.ll
llvm/trunk/test/CodeGen/R600/llvm.SI.sample.ll
llvm/trunk/test/CodeGen/R600/llvm.SI.sampled.ll
llvm/trunk/test/CodeGen/R600/llvm.SI.sendmsg.ll
llvm/trunk/test/CodeGen/R600/llvm.SI.tbuffer.store.ll
llvm/trunk/test/CodeGen/R600/llvm.amdgpu.kilp.ll
llvm/trunk/test/CodeGen/R600/llvm.amdgpu.lrp.ll
llvm/trunk/test/CodeGen/R600/llvm.cos.ll
llvm/trunk/test/CodeGen/R600/llvm.exp2.ll
llvm/trunk/test/CodeGen/R600/llvm.log2.ll
llvm/trunk/test/CodeGen/R600/llvm.memcpy.ll
llvm/trunk/test/CodeGen/R600/llvm.rint.ll
llvm/trunk/test/CodeGen/R600/llvm.sin.ll
llvm/trunk/test/CodeGen/R600/llvm.sqrt.ll
llvm/trunk/test/CodeGen/R600/load-i1.ll
llvm/trunk/test/CodeGen/R600/load.ll
llvm/trunk/test/CodeGen/R600/load.vec.ll
llvm/trunk/test/CodeGen/R600/load64.ll
llvm/trunk/test/CodeGen/R600/loop-idiom.ll
llvm/trunk/test/CodeGen/R600/lshl.ll
llvm/trunk/test/CodeGen/R600/lshr.ll
llvm/trunk/test/CodeGen/R600/m0-spill.ll
llvm/trunk/test/CodeGen/R600/mad_int24.ll
llvm/trunk/test/CodeGen/R600/mad_uint24.ll
llvm/trunk/test/CodeGen/R600/mul.ll
llvm/trunk/test/CodeGen/R600/mul_int24.ll
llvm/trunk/test/CodeGen/R600/mul_uint24.ll
llvm/trunk/test/CodeGen/R600/mulhu.ll
llvm/trunk/test/CodeGen/R600/no-initializer-constant-addrspace.ll
llvm/trunk/test/CodeGen/R600/or.ll
llvm/trunk/test/CodeGen/R600/private-memory-atomics.ll
llvm/trunk/test/CodeGen/R600/private-memory-broken.ll
llvm/trunk/test/CodeGen/R600/reorder-stores.ll
llvm/trunk/test/CodeGen/R600/rotl.i64.ll
llvm/trunk/test/CodeGen/R600/rotl.ll
llvm/trunk/test/CodeGen/R600/rotr.i64.ll
llvm/trunk/test/CodeGen/R600/rotr.ll
llvm/trunk/test/CodeGen/R600/s_movk_i32.ll
llvm/trunk/test/CodeGen/R600/saddo.ll
llvm/trunk/test/CodeGen/R600/scalar_to_vector.ll
llvm/trunk/test/CodeGen/R600/schedule-vs-if-nested-loop-failure.ll
llvm/trunk/test/CodeGen/R600/sdiv.ll
llvm/trunk/test/CodeGen/R600/sdivrem24.ll
llvm/trunk/test/CodeGen/R600/select-i1.ll
llvm/trunk/test/CodeGen/R600/select-vectors.ll
llvm/trunk/test/CodeGen/R600/select64.ll
llvm/trunk/test/CodeGen/R600/selectcc-opt.ll
llvm/trunk/test/CodeGen/R600/selectcc.ll
llvm/trunk/test/CodeGen/R600/setcc64.ll
llvm/trunk/test/CodeGen/R600/seto.ll
llvm/trunk/test/CodeGen/R600/setuo.ll
llvm/trunk/test/CodeGen/R600/sgpr-copy-duplicate-operand.ll
llvm/trunk/test/CodeGen/R600/sgpr-copy.ll
llvm/trunk/test/CodeGen/R600/shl.ll
llvm/trunk/test/CodeGen/R600/shl_add_ptr.ll
llvm/trunk/test/CodeGen/R600/si-annotate-cf-assertion.ll
llvm/trunk/test/CodeGen/R600/si-lod-bias.ll
llvm/trunk/test/CodeGen/R600/si-sgpr-spill.ll
llvm/trunk/test/CodeGen/R600/si-vector-hang.ll
llvm/trunk/test/CodeGen/R600/sign_extend.ll
llvm/trunk/test/CodeGen/R600/simplify-demanded-bits-build-pair.ll
llvm/trunk/test/CodeGen/R600/sint_to_fp.ll
llvm/trunk/test/CodeGen/R600/sra.ll
llvm/trunk/test/CodeGen/R600/srem.ll
llvm/trunk/test/CodeGen/R600/ssubo.ll
llvm/trunk/test/CodeGen/R600/store-v3i32.ll
llvm/trunk/test/CodeGen/R600/store-v3i64.ll
llvm/trunk/test/CodeGen/R600/store-vector-ptrs.ll
llvm/trunk/test/CodeGen/R600/store.ll
llvm/trunk/test/CodeGen/R600/subreg-coalescer-crash.ll
llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll
llvm/trunk/test/CodeGen/R600/trunc-store-i1.ll
llvm/trunk/test/CodeGen/R600/uaddo.ll
llvm/trunk/test/CodeGen/R600/udiv.ll
llvm/trunk/test/CodeGen/R600/udivrem.ll
llvm/trunk/test/CodeGen/R600/udivrem24.ll
llvm/trunk/test/CodeGen/R600/udivrem64.ll
llvm/trunk/test/CodeGen/R600/uint_to_fp.ll
llvm/trunk/test/CodeGen/R600/unaligned-load-store.ll
llvm/trunk/test/CodeGen/R600/unhandled-loop-condition-assertion.ll
llvm/trunk/test/CodeGen/R600/urecip.ll
llvm/trunk/test/CodeGen/R600/urem.ll
llvm/trunk/test/CodeGen/R600/usubo.ll
llvm/trunk/test/CodeGen/R600/v_cndmask.ll
llvm/trunk/test/CodeGen/R600/vector-alloca.ll
llvm/trunk/test/CodeGen/R600/vop-shrink.ll
llvm/trunk/test/CodeGen/R600/vselect.ll
llvm/trunk/test/CodeGen/R600/wait.ll
llvm/trunk/test/CodeGen/R600/xor.ll
llvm/trunk/test/CodeGen/R600/zero_extend.ll
Modified: llvm/trunk/test/CodeGen/R600/128bit-kernel-args.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/128bit-kernel-args.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/128bit-kernel-args.ll (original)
+++ llvm/trunk/test/CodeGen/R600/128bit-kernel-args.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK
; R600-CHECK: {{^}}v4i32_kernel_arg:
; R600-CHECK-DAG: MOV {{[* ]*}}T[[GPR:[0-9]]].X, KC0[3].Y
Modified: llvm/trunk/test/CodeGen/R600/32-bit-local-address-space.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/32-bit-local-address-space.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/32-bit-local-address-space.ll (original)
+++ llvm/trunk/test/CodeGen/R600/32-bit-local-address-space.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; On Southern Islands GPUs the local address space(3) uses 32-bit pointers and
; the global address space(1) uses 64-bit pointers. These tests check to make sure
Modified: llvm/trunk/test/CodeGen/R600/add-debug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/add-debug.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/add-debug.ll (original)
+++ llvm/trunk/test/CodeGen/R600/add-debug.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc < %s -march=amdgcn -mcpu=tahiti -debug
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -debug
; REQUIRES: asserts
; Check that SelectionDAGDumper does not crash on int_SI_if.
Modified: llvm/trunk/test/CodeGen/R600/add.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/add.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/add.ll (original)
+++ llvm/trunk/test/CodeGen/R600/add.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK --check-prefix=FUNC %s
; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK --check-prefix=FUNC %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK --check-prefix=FUNC %s
;FUNC-LABEL: {{^}}test1:
;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Modified: llvm/trunk/test/CodeGen/R600/address-space.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/address-space.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/address-space.ll (original)
+++ llvm/trunk/test/CodeGen/R600/address-space.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s
; Test that codegenprepare understands address space sizes
Modified: llvm/trunk/test/CodeGen/R600/and.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/and.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/and.ll (original)
+++ llvm/trunk/test/CodeGen/R600/and.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}test2:
; EG: AND_INT {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Modified: llvm/trunk/test/CodeGen/R600/anyext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/anyext.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/anyext.ll (original)
+++ llvm/trunk/test/CodeGen/R600/anyext.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
; CHECK-LABEL: {{^}}anyext_i1_i32:
; CHECK: v_cndmask_b32_e64
Modified: llvm/trunk/test/CodeGen/R600/atomic_load_add.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/atomic_load_add.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/atomic_load_add.ll (original)
+++ llvm/trunk/test/CodeGen/R600/atomic_load_add.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s -check-prefix=SI -check-prefix=FUNC
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s -check-prefix=SI -check-prefix=FUNC
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}atomic_add_local:
Modified: llvm/trunk/test/CodeGen/R600/atomic_load_sub.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/atomic_load_sub.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/atomic_load_sub.ll (original)
+++ llvm/trunk/test/CodeGen/R600/atomic_load_sub.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}atomic_sub_local:
; R600: LDS_SUB *
Modified: llvm/trunk/test/CodeGen/R600/basic-branch.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/basic-branch.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/basic-branch.ll (original)
+++ llvm/trunk/test/CodeGen/R600/basic-branch.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; XFAIL: *
; RUN: llc -O0 -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -O0 -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s
; CHECK-LABEL: {{^}}test_branch(
define void @test_branch(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i32 %val) nounwind {
Modified: llvm/trunk/test/CodeGen/R600/basic-loop.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/basic-loop.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/basic-loop.ll (original)
+++ llvm/trunk/test/CodeGen/R600/basic-loop.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -O0 -verify-machineinstrs -march=amdgcn -mcpu=SI < %s | FileCheck %s
+; RUN: llc -O0 -verify-machineinstrs -march=amdgcn -mcpu=tonga < %s | FileCheck %s
; CHECK-LABEL: {{^}}test_loop:
define void @test_loop(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i32 %val) nounwind {
Modified: llvm/trunk/test/CodeGen/R600/bfi_int.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/bfi_int.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/bfi_int.ll (original)
+++ llvm/trunk/test/CodeGen/R600/bfi_int.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600-CHECK %s
; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
; BFI_INT Definition pattern from ISA docs
; (y & x) | (z & ~x)
Modified: llvm/trunk/test/CodeGen/R600/bitcast.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/bitcast.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/bitcast.ll (original)
+++ llvm/trunk/test/CodeGen/R600/bitcast.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; This test just checks that the compiler doesn't crash.
Modified: llvm/trunk/test/CodeGen/R600/bswap.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/bswap.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/bswap.ll (original)
+++ llvm/trunk/test/CodeGen/R600/bswap.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
declare i32 @llvm.bswap.i32(i32) nounwind readnone
declare <2 x i32> @llvm.bswap.v2i32(<2 x i32>) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/build_vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/build_vector.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/build_vector.ll (original)
+++ llvm/trunk/test/CodeGen/R600/build_vector.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK
; R600-CHECK: {{^}}build_vector2:
; R600-CHECK: MOV
Modified: llvm/trunk/test/CodeGen/R600/call.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/call.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/call.ll (original)
+++ llvm/trunk/test/CodeGen/R600/call.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: not llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s 2>&1 | FileCheck %s
+; RUN: not llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s 2>&1 | FileCheck %s
; RUN: not llc -march=r600 -mcpu=cypress < %s 2>&1 | FileCheck %s
; CHECK: error: unsupported call to function external_function in test_call_external
Modified: llvm/trunk/test/CodeGen/R600/concat_vectors.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/concat_vectors.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/concat_vectors.ll (original)
+++ llvm/trunk/test/CodeGen/R600/concat_vectors.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}test_concat_v1i32:
; 0x80f000 is the high 32 bits of the resource descriptor used by MUBUF
Modified: llvm/trunk/test/CodeGen/R600/copy-illegal-type.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/copy-illegal-type.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/copy-illegal-type.ll (original)
+++ llvm/trunk/test/CodeGen/R600/copy-illegal-type.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}test_copy_v4i8:
; SI: buffer_load_dword [[REG:v[0-9]+]]
Modified: llvm/trunk/test/CodeGen/R600/copy-to-reg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/copy-to-reg.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/copy-to-reg.ll (original)
+++ llvm/trunk/test/CodeGen/R600/copy-to-reg.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -mattr=-promote-alloca -verify-machineinstrs < %s
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-promote-alloca -verify-machineinstrs < %s
; Test that CopyToReg instructions don't have non-register operands prior
; to being emitted.
Modified: llvm/trunk/test/CodeGen/R600/ctlz_zero_undef.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/ctlz_zero_undef.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/ctlz_zero_undef.ll (original)
+++ llvm/trunk/test/CodeGen/R600/ctlz_zero_undef.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/cttz-ctlz.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/cttz-ctlz.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/cttz-ctlz.ll (original)
+++ llvm/trunk/test/CodeGen/R600/cttz-ctlz.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: opt -S -codegenprepare -mtriple=r600-unknown-unknown -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=ALL %s
+; RUN: opt -S -codegenprepare -mtriple=r600-unknown-unknown -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=ALL %s
define i64 @test1(i64 %A) {
Modified: llvm/trunk/test/CodeGen/R600/cttz_zero_undef.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/cttz_zero_undef.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/cttz_zero_undef.ll (original)
+++ llvm/trunk/test/CodeGen/R600/cttz_zero_undef.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
declare i32 @llvm.cttz.i32(i32, i1) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/cvt_f32_ubyte.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/cvt_f32_ubyte.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/cvt_f32_ubyte.ll (original)
+++ llvm/trunk/test/CodeGen/R600/cvt_f32_ubyte.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
; SI-LABEL: {{^}}load_i8_to_f32:
; SI: buffer_load_ubyte [[LOADREG:v[0-9]+]],
Modified: llvm/trunk/test/CodeGen/R600/cvt_flr_i32_f32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/cvt_flr_i32_f32.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/cvt_flr_i32_f32.ll (original)
+++ llvm/trunk/test/CodeGen/R600/cvt_flr_i32_f32.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
declare float @llvm.fabs.f32(float) #1
declare float @llvm.floor.f32(float) #1
Modified: llvm/trunk/test/CodeGen/R600/cvt_rpi_i32_f32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/cvt_rpi_i32_f32.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/cvt_rpi_i32_f32.ll (original)
+++ llvm/trunk/test/CodeGen/R600/cvt_rpi_i32_f32.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
declare float @llvm.fabs.f32(float) #1
declare float @llvm.floor.f32(float) #1
Modified: llvm/trunk/test/CodeGen/R600/default-fp-mode.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/default-fp-mode.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/default-fp-mode.ll (original)
+++ llvm/trunk/test/CodeGen/R600/default-fp-mode.ll Tue Jan 27 11:27:15 2015
@@ -5,6 +5,13 @@
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=DEFAULT -check-prefix=FUNC %s
; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals < %s | FileCheck -check-prefix=DEFAULT -check-prefix=FUNC %s
; RUN: llc -march=amdgcn -mcpu=SI -mattr=+fp64-denormals < %s | FileCheck -check-prefix=DEFAULT -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals,+fp64-denormals < %s | FileCheck -check-prefix=FP64-DENORMAL -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp32-denormals,-fp64-denormals < %s | FileCheck -check-prefix=FP32-DENORMAL -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp32-denormals,+fp64-denormals < %s | FileCheck -check-prefix=BOTH-DENORMAL -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals,-fp64-denormals < %s | FileCheck -check-prefix=NO-DENORMAL -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=DEFAULT -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals < %s | FileCheck -check-prefix=DEFAULT -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp64-denormals < %s | FileCheck -check-prefix=DEFAULT -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}test_kernel:
Modified: llvm/trunk/test/CodeGen/R600/ds_read2_offset_order.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/ds_read2_offset_order.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/ds_read2_offset_order.ll (original)
+++ llvm/trunk/test/CodeGen/R600/ds_read2_offset_order.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck -strict-whitespace -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck -strict-whitespace -check-prefix=SI %s
; XFAIL: *
Modified: llvm/trunk/test/CodeGen/R600/elf.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/elf.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/elf.ll (original)
+++ llvm/trunk/test/CodeGen/R600/elf.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,7 @@
; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs -filetype=obj | llvm-readobj -s -symbols - | FileCheck --check-prefix=ELF-CHECK %s
; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs -o - | FileCheck --check-prefix=CONFIG-CHECK %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs -filetype=obj | llvm-readobj -s -symbols - | FileCheck --check-prefix=ELF-CHECK %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs -o - | FileCheck --check-prefix=CONFIG-CHECK %s
; ELF-CHECK: Format: ELF32
; ELF-CHECK: Name: .AMDGPU.config
Modified: llvm/trunk/test/CodeGen/R600/empty-function.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/empty-function.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/empty-function.ll (original)
+++ llvm/trunk/test/CodeGen/R600/empty-function.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
; Make sure we don't assert on empty functions
Modified: llvm/trunk/test/CodeGen/R600/extload.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/extload.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/extload.ll (original)
+++ llvm/trunk/test/CodeGen/R600/extload.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}anyext_load_i8:
; EG: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+.[XYZW]]],
Modified: llvm/trunk/test/CodeGen/R600/extract_vector_elt_i16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/extract_vector_elt_i16.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/extract_vector_elt_i16.ll (original)
+++ llvm/trunk/test/CodeGen/R600/extract_vector_elt_i16.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}extract_vector_elt_v2i16:
; SI: buffer_load_ushort
Modified: llvm/trunk/test/CodeGen/R600/fadd.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fadd.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fadd.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fadd.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s -check-prefix=R600 -check-prefix=FUNC
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s -check-prefix=SI -check-prefix=FUNC
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s -check-prefix=SI -check-prefix=FUNC
; FUNC-LABEL: {{^}}fadd_f32:
; R600: ADD {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].W
Modified: llvm/trunk/test/CodeGen/R600/fadd64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fadd64.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fadd64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fadd64.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc < %s -march=amdgcn -mcpu=tahiti -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
; CHECK: {{^}}fadd_f64:
; CHECK: v_add_f64 {{v[[0-9]+:[0-9]+]}}, {{v[[0-9]+:[0-9]+]}}, {{v[[0-9]+:[0-9]+]}}
Modified: llvm/trunk/test/CodeGen/R600/fceil.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fceil.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fceil.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fceil.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
declare float @llvm.ceil.f32(float) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/fcmp64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fcmp64.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fcmp64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fcmp64.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc < %s -march=amdgcn -mcpu=tahiti -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
; CHECK-LABEL: {{^}}flt_f64:
; CHECK: v_cmp_nge_f64_e32 vcc, {{v[[0-9]+:[0-9]+], v[[0-9]+:[0-9]+]}}
Modified: llvm/trunk/test/CodeGen/R600/fconst64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fconst64.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fconst64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fconst64.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc < %s -march=amdgcn -mcpu=tahiti -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
; CHECK: {{^}}fconst_f64:
; CHECK-DAG: s_mov_b32 {{s[0-9]+}}, 0x40140000
Modified: llvm/trunk/test/CodeGen/R600/fdiv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fdiv.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fdiv.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fdiv.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 %s
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
; These tests check that fdiv is expanded correctly and also test that the
; scheduler is scheduling the RECIP_IEEE and MUL_IEEE instructions in separate
Modified: llvm/trunk/test/CodeGen/R600/fdiv64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fdiv64.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fdiv64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fdiv64.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc < %s -march=amdgcn -mcpu=tahiti -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
; CHECK: {{^}}fdiv_f64:
; CHECK: v_rcp_f64_e32 {{v\[[0-9]+:[0-9]+\]}}
Modified: llvm/trunk/test/CodeGen/R600/ffloor.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/ffloor.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/ffloor.ll (original)
+++ llvm/trunk/test/CodeGen/R600/ffloor.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}floor_f32:
Modified: llvm/trunk/test/CodeGen/R600/flat-address-space.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/flat-address-space.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/flat-address-space.ll (original)
+++ llvm/trunk/test/CodeGen/R600/flat-address-space.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,7 @@
; RUN: llc -O0 -march=amdgcn -mcpu=bonaire -mattr=-promote-alloca < %s | FileCheck -check-prefix=CHECK -check-prefix=CHECK-NO-PROMOTE %s
; RUN: llc -O0 -march=amdgcn -mcpu=bonaire -mattr=+promote-alloca < %s | FileCheck -check-prefix=CHECK -check-prefix=CHECK-PROMOTE %s
+; RUN: llc -O0 -march=amdgcn -mcpu=tonga -mattr=-promote-alloca < %s | FileCheck -check-prefix=CHECK -check-prefix=CHECK-NO-PROMOTE %s
+; RUN: llc -O0 -march=amdgcn -mcpu=tonga -mattr=+promote-alloca < %s | FileCheck -check-prefix=CHECK -check-prefix=CHECK-PROMOTE %s
; Disable optimizations in case there are optimizations added that
; specialize away generic pointer accesses.
Modified: llvm/trunk/test/CodeGen/R600/fma.f64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fma.f64.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fma.f64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fma.f64.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
declare double @llvm.fma.f64(double, double, double) nounwind readnone
declare <2 x double> @llvm.fma.v2f64(<2 x double>, <2 x double>, <2 x double>) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/fmax3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fmax3.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fmax3.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fmax3.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
declare float @llvm.maxnum.f32(float, float) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/fmaxnum.f64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fmaxnum.f64.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fmaxnum.f64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fmaxnum.f64.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
declare double @llvm.maxnum.f64(double, double) #0
declare <2 x double> @llvm.maxnum.v2f64(<2 x double>, <2 x double>) #0
Modified: llvm/trunk/test/CodeGen/R600/fmaxnum.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fmaxnum.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fmaxnum.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fmaxnum.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
declare float @llvm.maxnum.f32(float, float) #0
declare <2 x float> @llvm.maxnum.v2f32(<2 x float>, <2 x float>) #0
Modified: llvm/trunk/test/CodeGen/R600/fmin3.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fmin3.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fmin3.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fmin3.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,6 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
declare float @llvm.minnum.f32(float, float) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/fminnum.f64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fminnum.f64.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fminnum.f64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fminnum.f64.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
declare double @llvm.minnum.f64(double, double) #0
declare <2 x double> @llvm.minnum.v2f64(<2 x double>, <2 x double>) #0
Modified: llvm/trunk/test/CodeGen/R600/fminnum.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fminnum.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fminnum.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fminnum.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
declare float @llvm.minnum.f32(float, float) #0
declare <2 x float> @llvm.minnum.v2f32(<2 x float>, <2 x float>) #0
Modified: llvm/trunk/test/CodeGen/R600/fmul.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fmul.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fmul.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fmul.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
Modified: llvm/trunk/test/CodeGen/R600/fmul64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fmul64.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fmul64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fmul64.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=FUNC -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=FUNC -check-prefix=SI %s
; FUNC-LABEL: {{^}}fmul_f64:
; SI: v_mul_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\]}}
Modified: llvm/trunk/test/CodeGen/R600/fnearbyint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fnearbyint.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fnearbyint.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fnearbyint.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s
; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s
; This should have the exactly the same output as the test for rint,
; so no need to check anything.
Modified: llvm/trunk/test/CodeGen/R600/fneg-fabs.f64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fneg-fabs.f64.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fneg-fabs.f64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fneg-fabs.f64.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; FIXME: Check something here. Currently it seems fabs + fneg aren't
; into 2 modifiers, although theoretically that should work.
Modified: llvm/trunk/test/CodeGen/R600/fneg-fabs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fneg-fabs.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fneg-fabs.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fneg-fabs.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}fneg_fabs_fadd_f32:
Modified: llvm/trunk/test/CodeGen/R600/fp-classify.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fp-classify.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fp-classify.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fp-classify.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
declare i1 @llvm.AMDGPU.class.f32(float, i32) #1
declare i1 @llvm.AMDGPU.class.f64(double, i32) #1
Modified: llvm/trunk/test/CodeGen/R600/fp16_to_fp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fp16_to_fp.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fp16_to_fp.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fp16_to_fp.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
declare float @llvm.convert.from.fp16.f32(i16) nounwind readnone
declare double @llvm.convert.from.fp16.f64(i16) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/fp32_to_fp16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fp32_to_fp16.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fp32_to_fp16.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fp32_to_fp16.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
declare i16 @llvm.convert.to.fp16.f32(float) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/fp_to_sint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fp_to_sint.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fp_to_sint.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fp_to_sint.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s --check-prefix=EG --check-prefix=FUNC
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s --check-prefix=SI --check-prefix=FUNC
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s --check-prefix=SI --check-prefix=FUNC
declare float @llvm.fabs.f32(float) #0
Modified: llvm/trunk/test/CodeGen/R600/fp_to_uint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fp_to_uint.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fp_to_uint.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fp_to_uint.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s -check-prefix=EG -check-prefix=FUNC
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s -check-prefix=SI -check-prefix=FUNC
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s -check-prefix=SI -check-prefix=FUNC
; FUNC-LABEL: {{^}}fp_to_uint_f32_to_i32:
; EG: FLT_TO_UINT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
Modified: llvm/trunk/test/CodeGen/R600/fpext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fpext.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fpext.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fpext.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}fpext_f32_to_f64:
; SI: v_cvt_f64_f32_e32 {{v\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}}
Modified: llvm/trunk/test/CodeGen/R600/fptrunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fptrunc.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fptrunc.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fptrunc.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}fptrunc_f64_to_f32:
; SI: v_cvt_f32_f64_e32 {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}
Modified: llvm/trunk/test/CodeGen/R600/fsqrt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fsqrt.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fsqrt.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fsqrt.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,7 @@
; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -enable-unsafe-fp-math < %s | FileCheck %s
; Run with unsafe-fp-math to make sure nothing tries to turn this into 1 / rsqrt(x)
Modified: llvm/trunk/test/CodeGen/R600/fsub.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fsub.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fsub.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fsub.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}v_fsub_f32:
Modified: llvm/trunk/test/CodeGen/R600/fsub64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/fsub64.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/fsub64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/fsub64.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
; SI-LABEL: {{^}}fsub_f64:
; SI: v_add_f64 {{v\[[0-9]+:[0-9]+\], v\[[0-9]+:[0-9]+\], -v\[[0-9]+:[0-9]+\]}}
Modified: llvm/trunk/test/CodeGen/R600/ftrunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/ftrunc.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/ftrunc.ll (original)
+++ llvm/trunk/test/CodeGen/R600/ftrunc.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG --check-prefix=FUNC %s
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI --check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI --check-prefix=FUNC %s
declare float @llvm.trunc.f32(float) nounwind readnone
declare <2 x float> @llvm.trunc.v2f32(<2 x float>) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/global-directive.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/global-directive.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/global-directive.ll (original)
+++ llvm/trunk/test/CodeGen/R600/global-directive.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
; Make sure the GlobalDirective isn't merged with the function name
Modified: llvm/trunk/test/CodeGen/R600/global-extload-i1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/global-extload-i1.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/global-extload-i1.ll (original)
+++ llvm/trunk/test/CodeGen/R600/global-extload-i1.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; XUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
; FIXME: Evergreen broken
Modified: llvm/trunk/test/CodeGen/R600/global-extload-i16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/global-extload-i16.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/global-extload-i16.ll (original)
+++ llvm/trunk/test/CodeGen/R600/global-extload-i16.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; XUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
; FIXME: cypress is broken because the bigger testcases spill and it's not implemented
Modified: llvm/trunk/test/CodeGen/R600/global-extload-i32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/global-extload-i32.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/global-extload-i32.ll (original)
+++ llvm/trunk/test/CodeGen/R600/global-extload-i32.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}zextload_global_i32_to_i64:
Modified: llvm/trunk/test/CodeGen/R600/global-extload-i8.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/global-extload-i8.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/global-extload-i8.ll (original)
+++ llvm/trunk/test/CodeGen/R600/global-extload-i8.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}zextload_global_i8_to_i32:
Modified: llvm/trunk/test/CodeGen/R600/global-zero-initializer.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/global-zero-initializer.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/global-zero-initializer.ll (original)
+++ llvm/trunk/test/CodeGen/R600/global-zero-initializer.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: not llc -march=amdgcn -mcpu=SI < %s 2>&1 | FileCheck %s
+; RUN: not llc -march=amdgcn -mcpu=tonga < %s 2>&1 | FileCheck %s
; CHECK: error: unsupported initializer for address space in load_init_global_global
Modified: llvm/trunk/test/CodeGen/R600/half.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/half.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/half.ll (original)
+++ llvm/trunk/test/CodeGen/R600/half.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc < %s -march=amdgcn -mcpu=SI | FileCheck %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga | FileCheck %s
define void @test_load_store(half addrspace(1)* %in, half addrspace(1)* %out) {
; CHECK-LABEL: {{^}}test_load_store:
Modified: llvm/trunk/test/CodeGen/R600/i1-copy-implicit-def.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/i1-copy-implicit-def.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/i1-copy-implicit-def.ll (original)
+++ llvm/trunk/test/CodeGen/R600/i1-copy-implicit-def.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
; SILowerI1Copies was not handling IMPLICIT_DEF
; SI-LABEL: {{^}}br_implicit_def:
Modified: llvm/trunk/test/CodeGen/R600/i1-copy-phi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/i1-copy-phi.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/i1-copy-phi.ll (original)
+++ llvm/trunk/test/CodeGen/R600/i1-copy-phi.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
; SI-LABEL: {{^}}br_i1_phi:
; SI: v_mov_b32_e32 [[REG:v[0-9]+]], 0{{$}}
Modified: llvm/trunk/test/CodeGen/R600/icmp64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/icmp64.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/icmp64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/icmp64.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
; SI-LABEL: {{^}}test_i64_eq:
; SI: v_cmp_eq_i64
Modified: llvm/trunk/test/CodeGen/R600/indirect-addressing-si.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/indirect-addressing-si.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/indirect-addressing-si.ll (original)
+++ llvm/trunk/test/CodeGen/R600/indirect-addressing-si.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
; Tests for indirect addressing on SI, which is implemented using dynamic
; indexing of vectors.
Modified: llvm/trunk/test/CodeGen/R600/indirect-private-64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/indirect-private-64.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/indirect-private-64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/indirect-private-64.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,7 @@
; RUN: llc -march=amdgcn -mcpu=SI -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-ALLOCA -check-prefix=SI %s
; RUN: llc -march=amdgcn -mcpu=SI -mattr=+promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-PROMOTE -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-ALLOCA -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-PROMOTE -check-prefix=SI %s
declare void @llvm.AMDGPU.barrier.local() noduplicate nounwind
Modified: llvm/trunk/test/CodeGen/R600/infinite-loop.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/infinite-loop.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/infinite-loop.ll (original)
+++ llvm/trunk/test/CodeGen/R600/infinite-loop.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
; SI-LABEL: {{^}}infinite_loop:
; SI: v_mov_b32_e32 [[REG:v[0-9]+]], 0x3e7
Modified: llvm/trunk/test/CodeGen/R600/inline-asm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/inline-asm.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/inline-asm.ll (original)
+++ llvm/trunk/test/CodeGen/R600/inline-asm.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -march=r600 -mcpu=tonga -verify-machineinstrs | FileCheck %s
; CHECK: {{^}}inline_asm:
; CHECK: s_endpgm
Modified: llvm/trunk/test/CodeGen/R600/inline-calls.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/inline-calls.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/inline-calls.ll (original)
+++ llvm/trunk/test/CodeGen/R600/inline-calls.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck %s
; CHECK-NOT: {{^}}func:
Modified: llvm/trunk/test/CodeGen/R600/insert_subreg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/insert_subreg.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/insert_subreg.ll (original)
+++ llvm/trunk/test/CodeGen/R600/insert_subreg.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -mattr=-promote-alloca -verify-machineinstrs < %s
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-promote-alloca -verify-machineinstrs < %s
; Test that INSERT_SUBREG instructions don't have non-register operands after
; instruction selection.
Modified: llvm/trunk/test/CodeGen/R600/insert_vector_elt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/insert_vector_elt.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/insert_vector_elt.ll (original)
+++ llvm/trunk/test/CodeGen/R600/insert_vector_elt.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI %s
; FIXME: Broken on evergreen
; FIXME: For some reason the 8 and 16 vectors are being stored as
Modified: llvm/trunk/test/CodeGen/R600/large-alloca.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/large-alloca.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/large-alloca.ll (original)
+++ llvm/trunk/test/CodeGen/R600/large-alloca.ll Tue Jan 27 11:27:15 2015
@@ -1,6 +1,7 @@
; XFAIL: *
; REQUIRES: asserts
; RUN: llc -march=amdgcn -mcpu=SI < %s
+; RUN: llc -march=amdgcn -mcpu=tonga < %s
define void @large_alloca(i32 addrspace(1)* %out, i32 %x, i32 %y) nounwind {
%large = alloca [8192 x i32], align 4
Modified: llvm/trunk/test/CodeGen/R600/large-constant-initializer.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/large-constant-initializer.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/large-constant-initializer.ll (original)
+++ llvm/trunk/test/CodeGen/R600/large-constant-initializer.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI < %s
+; RUN: llc -march=amdgcn -mcpu=tonga < %s
; CHECK: s_endpgm
@gv = external unnamed_addr addrspace(2) constant [239 x i32], align 4
Modified: llvm/trunk/test/CodeGen/R600/lds-initializer.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/lds-initializer.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/lds-initializer.ll (original)
+++ llvm/trunk/test/CodeGen/R600/lds-initializer.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: not llc -march=amdgcn -mcpu=SI < %s 2>&1 | FileCheck %s
+; RUN: not llc -march=amdgcn -mcpu=tonga < %s 2>&1 | FileCheck %s
; CHECK: error: unsupported initializer for address space in load_init_lds_global
Modified: llvm/trunk/test/CodeGen/R600/lds-zero-initializer.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/lds-zero-initializer.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/lds-zero-initializer.ll (original)
+++ llvm/trunk/test/CodeGen/R600/lds-zero-initializer.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: not llc -march=amdgcn -mcpu=SI < %s 2>&1 | FileCheck %s
+; RUN: not llc -march=amdgcn -mcpu=tonga < %s 2>&1 | FileCheck %s
; CHECK: error: unsupported initializer for address space in load_zeroinit_lds_global
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.abs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.abs.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.abs.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.abs.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
declare i32 @llvm.AMDGPU.abs(i32) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfe.i32.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood -show-mc-encoding -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
declare i32 @llvm.AMDGPU.bfe.i32(i32, i32, i32) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfe.u32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfe.u32.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfe.u32.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfe.u32.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
declare i32 @llvm.AMDGPU.bfe.u32(i32, i32, i32) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfi.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfi.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfi.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
declare i32 @llvm.AMDGPU.bfi(i32, i32, i32) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfm.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfm.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfm.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.bfm.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
declare i32 @llvm.AMDGPU.bfm(i32, i32) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.brev.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.brev.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.brev.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.brev.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
declare i32 @llvm.AMDGPU.brev(i32) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.clamp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.clamp.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.clamp.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.clamp.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -strict-whitespace -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
declare float @llvm.fabs.f32(float) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.cvt_f32_ubyte.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.cvt_f32_ubyte.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.cvt_f32_ubyte.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.cvt_f32_ubyte.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI %s
declare float @llvm.AMDGPU.cvt.f32.ubyte0(i32) nounwind readnone
declare float @llvm.AMDGPU.cvt.f32.ubyte1(i32) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.fract.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.fract.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.fract.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.fract.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
declare float @llvm.AMDGPU.fract.f32(float) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.imad24.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.imad24.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.imad24.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.imad24.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=cayman -verify-machineinstrs < %s | FileCheck -check-prefix=CM -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
; XUN: llc -march=r600 -mcpu=r600 -verify-machineinstrs < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.imax.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.imax.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.imax.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.imax.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck -check-prefix=SI %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck -check-prefix=SI %s
; SI-LABEL: {{^}}vector_imax:
; SI: v_max_i32_e32
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.imin.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.imin.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.imin.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.imin.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck -check-prefix=SI %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck -check-prefix=SI %s
; SI-LABEL: {{^}}vector_imin:
; SI: v_min_i32_e32
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.imul24.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.imul24.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.imul24.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.imul24.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=cayman -verify-machineinstrs < %s | FileCheck -check-prefix=CM -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.kill.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.kill.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.kill.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.kill.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
; SI-LABEL: {{^}}kill_gs_const:
; SI-NOT: v_cmpx_le_f32
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.ldexp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.ldexp.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.ldexp.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.ldexp.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
declare float @llvm.AMDGPU.ldexp.f32(float, i32) nounwind readnone
declare double @llvm.AMDGPU.ldexp.f64(double, i32) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.rcp.f64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.rcp.f64.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.rcp.f64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.rcp.f64.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
declare double @llvm.AMDGPU.rcp.f64(double) nounwind readnone
declare double @llvm.sqrt.f64(double) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.rcp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.rcp.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.rcp.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.rcp.ll Tue Jan 27 11:27:15 2015
@@ -1,6 +1,9 @@
; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck -check-prefix=SI-UNSAFE -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE -check-prefix=SI -check-prefix=FUNC %s
; XUN: llc -march=amdgcn -mcpu=SI -mattr=+fp32-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE-SPDENORM -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals -enable-unsafe-fp-math -verify-machineinstrs < %s | FileCheck -check-prefix=SI-UNSAFE -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE -check-prefix=SI -check-prefix=FUNC %s
+; XUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp32-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE-SPDENORM -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG-SAFE -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=cayman -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.rsq.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.rsq.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.rsq.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.rsq.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
declare float @llvm.AMDGPU.rsq.f32(float) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.trig_preop.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.trig_preop.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.trig_preop.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.trig_preop.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
declare double @llvm.AMDGPU.trig.preop.f64(double, i32) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.trunc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.trunc.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.trunc.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.trunc.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600-CHECK %s
; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
; R600-CHECK: {{^}}amdgpu_trunc:
; R600-CHECK: TRUNC T{{[0-9]+\.[XYZW]}}, KC0[2].Z
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.umax.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.umax.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.umax.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.umax.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck -check-prefix=SI %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck -check-prefix=SI %s
; SI-LABEL: {{^}}vector_umax:
; SI: v_max_u32_e32
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.umin.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.umin.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.umin.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.umin.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck -check-prefix=SI %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck -check-prefix=SI %s
; SI-LABEL: {{^}}vector_umin:
; SI: v_min_u32_e32
Modified: llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.umul24.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.umul24.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.umul24.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.AMDGPU.umul24.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
; RUN: llc -march=r600 -mcpu=cayman -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
; XUN: llc -march=r600 -mcpu=r600 -verify-machineinstrs < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
Modified: llvm/trunk/test/CodeGen/R600/llvm.SI.fs.interp.constant.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.SI.fs.interp.constant.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.SI.fs.interp.constant.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.SI.fs.interp.constant.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
;CHECK: s_mov_b32
;CHECK-NEXT: v_interp_mov_f32
Modified: llvm/trunk/test/CodeGen/R600/llvm.SI.gather4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.SI.gather4.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.SI.gather4.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.SI.gather4.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
;CHECK-LABEL: {{^}}gather4_v2:
;CHECK: image_gather4 {{v\[[0-9]+:[0-9]+\]}}, 1, 0, 0, -1, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
Modified: llvm/trunk/test/CodeGen/R600/llvm.SI.getlod.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.SI.getlod.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.SI.getlod.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.SI.getlod.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
;CHECK-LABEL: {{^}}getlod:
;CHECK: image_get_lod {{v\[[0-9]+:[0-9]+\]}}, 3, 0, 0, -1, 0, 0, 0, 0, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
Modified: llvm/trunk/test/CodeGen/R600/llvm.SI.image.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.SI.image.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.SI.image.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.SI.image.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
;CHECK-LABEL: {{^}}image_load:
;CHECK: image_load {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
Modified: llvm/trunk/test/CodeGen/R600/llvm.SI.image.sample.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.SI.image.sample.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.SI.image.sample.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.SI.image.sample.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
;CHECK-LABEL: {{^}}sample:
;CHECK: image_sample {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
Modified: llvm/trunk/test/CodeGen/R600/llvm.SI.image.sample.o.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.SI.image.sample.o.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.SI.image.sample.o.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.SI.image.sample.o.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
;CHECK-LABEL: {{^}}sample:
;CHECK: image_sample_o {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, 0, 0, 0, 0, 0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}
Modified: llvm/trunk/test/CodeGen/R600/llvm.SI.imageload.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.SI.imageload.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.SI.imageload.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.SI.imageload.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
;CHECK-DAG: image_load {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, -1
;CHECK-DAG: image_load_mip {{v\[[0-9]+:[0-9]+\]}}, 3, 0, 0, 0
Modified: llvm/trunk/test/CodeGen/R600/llvm.SI.load.dword.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.SI.load.dword.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.SI.load.dword.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.SI.load.dword.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
; Example of a simple geometry shader loading vertex attributes from the
; ESGS ring buffer
Modified: llvm/trunk/test/CodeGen/R600/llvm.SI.resinfo.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.SI.resinfo.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.SI.resinfo.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.SI.resinfo.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s
; CHECK-DAG: image_get_resinfo {{v\[[0-9]+:[0-9]+\]}}, 15, 0, 0, -1
; CHECK-DAG: image_get_resinfo {{v\[[0-9]+:[0-9]+\]}}, 3, 0, 0, 0
Modified: llvm/trunk/test/CodeGen/R600/llvm.SI.sample-masked.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.SI.sample-masked.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.SI.sample-masked.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.SI.sample-masked.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
;RUN: llc < %s -march=amdgcn -mcpu=verde | FileCheck %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga | FileCheck %s
; CHECK-LABEL: {{^}}v1:
; CHECK: image_sample {{v\[[0-9]+:[0-9]+\]}}, 13
Modified: llvm/trunk/test/CodeGen/R600/llvm.SI.sample.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.SI.sample.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.SI.sample.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.SI.sample.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
;CHECK-DAG: image_sample {{v\[[0-9]+:[0-9]+\]}}, 15
;CHECK-DAG: image_sample {{v\[[0-9]+:[0-9]+\]}}, 3
Modified: llvm/trunk/test/CodeGen/R600/llvm.SI.sampled.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.SI.sampled.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.SI.sampled.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.SI.sampled.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
;CHECK-DAG: image_sample_d {{v\[[0-9]+:[0-9]+\]}}, 15
;CHECK-DAG: image_sample_d {{v\[[0-9]+:[0-9]+\]}}, 3
Modified: llvm/trunk/test/CodeGen/R600/llvm.SI.sendmsg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.SI.sendmsg.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.SI.sendmsg.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.SI.sendmsg.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
; CHECK-LABEL: {{^}}main:
; CHECK: s_sendmsg Gs(emit stream 0)
Modified: llvm/trunk/test/CodeGen/R600/llvm.SI.tbuffer.store.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.SI.tbuffer.store.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.SI.tbuffer.store.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.SI.tbuffer.store.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
;CHECK-LABEL: {{^}}test1:
;CHECK: tbuffer_store_format_xyzw {{v\[[0-9]+:[0-9]+\]}}, 0x20, -1, 0, -1, 0, 14, 4, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, -1, 0, 0
Modified: llvm/trunk/test/CodeGen/R600/llvm.amdgpu.kilp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.amdgpu.kilp.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.amdgpu.kilp.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.amdgpu.kilp.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
; SI-LABEL: {{^}}kilp_gs_const:
; SI: s_mov_b64 exec, 0
Modified: llvm/trunk/test/CodeGen/R600/llvm.amdgpu.lrp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.amdgpu.lrp.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.amdgpu.lrp.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.amdgpu.lrp.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
declare float @llvm.AMDGPU.lrp(float, float, float) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/llvm.cos.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.cos.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.cos.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.cos.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s -check-prefix=EG -check-prefix=FUNC
;RUN: llc < %s -march=amdgcn -mcpu=SI | FileCheck %s -check-prefix=SI -check-prefix=FUNC
+;RUN: llc < %s -march=amdgcn -mcpu=tonga | FileCheck %s -check-prefix=SI -check-prefix=FUNC
;FUNC-LABEL: test
;EG: MULADD_IEEE *
Modified: llvm/trunk/test/CodeGen/R600/llvm.exp2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.exp2.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.exp2.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.exp2.ll Tue Jan 27 11:27:15 2015
@@ -1,6 +1,7 @@
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG-CHECK --check-prefix=FUNC
;RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=CM-CHECK --check-prefix=FUNC
;RUN: llc < %s -march=amdgcn -mcpu=SI | FileCheck %s --check-prefix=SI-CHECK --check-prefix=FUNC
+;RUN: llc < %s -march=amdgcn -mcpu=tonga | FileCheck %s --check-prefix=SI-CHECK --check-prefix=FUNC
;FUNC-LABEL: {{^}}test:
;EG-CHECK: EXP_IEEE
Modified: llvm/trunk/test/CodeGen/R600/llvm.log2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.log2.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.log2.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.log2.ll Tue Jan 27 11:27:15 2015
@@ -1,6 +1,7 @@
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG-CHECK --check-prefix=FUNC
;RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=CM-CHECK --check-prefix=FUNC
;RUN: llc < %s -march=amdgcn -mcpu=SI | FileCheck %s --check-prefix=SI-CHECK --check-prefix=FUNC
+;RUN: llc < %s -march=amdgcn -mcpu=tonga | FileCheck %s --check-prefix=SI-CHECK --check-prefix=FUNC
;FUNC-LABEL: {{^}}test:
;EG-CHECK: LOG_IEEE
Modified: llvm/trunk/test/CodeGen/R600/llvm.memcpy.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.memcpy.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.memcpy.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.memcpy.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
declare void @llvm.memcpy.p3i8.p3i8.i32(i8 addrspace(3)* nocapture, i8 addrspace(3)* nocapture, i32, i32, i1) nounwind
declare void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* nocapture, i8 addrspace(1)* nocapture, i64, i32, i1) nounwind
Modified: llvm/trunk/test/CodeGen/R600/llvm.rint.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.rint.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.rint.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.rint.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck %s -check-prefix=R600 -check-prefix=FUNC
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}rint_f32:
; R600: RNDNE
Modified: llvm/trunk/test/CodeGen/R600/llvm.sin.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.sin.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.sin.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.sin.ll Tue Jan 27 11:27:15 2015
@@ -1,6 +1,8 @@
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=SI-SAFE -check-prefix=FUNC %s
; RUN: llc -march=amdgcn -mcpu=SI -enable-unsafe-fp-math < %s | FileCheck -check-prefix=SI -check-prefix=SI-UNSAFE -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=SI-SAFE -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -enable-unsafe-fp-math < %s | FileCheck -check-prefix=SI -check-prefix=SI-UNSAFE -check-prefix=FUNC %s
; FUNC-LABEL: sin_f32
; EG: MULADD_IEEE *
Modified: llvm/trunk/test/CodeGen/R600/llvm.sqrt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/llvm.sqrt.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/llvm.sqrt.ll (original)
+++ llvm/trunk/test/CodeGen/R600/llvm.sqrt.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc < %s -march=r600 --mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
; RUN: llc < %s -march=r600 --mcpu=SI -verify-machineinstrs| FileCheck %s --check-prefix=SI-CHECK
+; RUN: llc < %s -march=r600 --mcpu=tonga -verify-machineinstrs| FileCheck %s --check-prefix=SI-CHECK
; R600-CHECK-LABEL: {{^}}sqrt_f32:
; R600-CHECK: RECIPSQRT_CLAMPED * T{{[0-9]\.[XYZW]}}, KC0[2].Z
Modified: llvm/trunk/test/CodeGen/R600/load-i1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/load-i1.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/load-i1.ll (original)
+++ llvm/trunk/test/CodeGen/R600/load-i1.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}global_copy_i1_to_i1:
Modified: llvm/trunk/test/CodeGen/R600/load.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/load.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/load.ll (original)
+++ llvm/trunk/test/CodeGen/R600/load.ll Tue Jan 27 11:27:15 2015
@@ -1,6 +1,7 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600-CHECK --check-prefix=FUNC %s
; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck --check-prefix=R600-CHECK --check-prefix=FUNC %s
; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK --check-prefix=FUNC %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK --check-prefix=FUNC %s
;===------------------------------------------------------------------------===;
; GLOBAL ADDRESS SPACE
Modified: llvm/trunk/test/CodeGen/R600/load.vec.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/load.vec.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/load.vec.ll (original)
+++ llvm/trunk/test/CodeGen/R600/load.vec.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
; load a v2i32 value from the global address space.
; EG-CHECK: {{^}}load_v2i32:
Modified: llvm/trunk/test/CodeGen/R600/load64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/load64.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/load64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/load64.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc < %s -march=amdgcn -mcpu=tahiti -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
; load a f64 value from the global address space.
; CHECK-LABEL: {{^}}load_f64:
Modified: llvm/trunk/test/CodeGen/R600/loop-idiom.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/loop-idiom.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/loop-idiom.ll (original)
+++ llvm/trunk/test/CodeGen/R600/loop-idiom.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: opt -basicaa -loop-idiom -S < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600 --check-prefix=FUNC %s
; RUN: opt -basicaa -loop-idiom -S < %s -march=amdgcn -mcpu=SI -verify-machineinstrs| FileCheck --check-prefix=SI --check-prefix=FUNC %s
+; RUN: opt -basicaa -loop-idiom -S < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs| FileCheck --check-prefix=SI --check-prefix=FUNC %s
target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:32:32-p5:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
target triple = "r600--"
Modified: llvm/trunk/test/CodeGen/R600/lshl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/lshl.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/lshl.ll (original)
+++ llvm/trunk/test/CodeGen/R600/lshl.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
;CHECK: s_lshl_b32 s{{[0-9]}}, s{{[0-9]}}, 1
Modified: llvm/trunk/test/CodeGen/R600/lshr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/lshr.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/lshr.ll (original)
+++ llvm/trunk/test/CodeGen/R600/lshr.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
;CHECK: s_lshr_b32 s{{[0-9]}}, s{{[0-9]}}, 1
Modified: llvm/trunk/test/CodeGen/R600/m0-spill.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/m0-spill.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/m0-spill.ll (original)
+++ llvm/trunk/test/CodeGen/R600/m0-spill.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
@lds = external addrspace(3) global [64 x float]
Modified: llvm/trunk/test/CodeGen/R600/mad_int24.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/mad_int24.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/mad_int24.ll (original)
+++ llvm/trunk/test/CodeGen/R600/mad_int24.ll Tue Jan 27 11:27:15 2015
@@ -1,6 +1,7 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG --check-prefix=FUNC
; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=CM --check-prefix=FUNC
; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC
declare i32 @llvm.AMDGPU.imul24(i32, i32) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/mad_uint24.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/mad_uint24.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/mad_uint24.ll (original)
+++ llvm/trunk/test/CodeGen/R600/mad_uint24.ll Tue Jan 27 11:27:15 2015
@@ -1,6 +1,7 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG --check-prefix=FUNC
; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=EG --check-prefix=FUNC
; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC
; FUNC-LABEL: {{^}}u32_mad24:
; EG: MULADD_UINT24
Modified: llvm/trunk/test/CodeGen/R600/mul.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/mul.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/mul.ll (original)
+++ llvm/trunk/test/CodeGen/R600/mul.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG %s -check-prefix=FUNC
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; mul24 and mad24 are affected
Modified: llvm/trunk/test/CodeGen/R600/mul_int24.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/mul_int24.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/mul_int24.ll (original)
+++ llvm/trunk/test/CodeGen/R600/mul_int24.ll Tue Jan 27 11:27:15 2015
@@ -1,6 +1,7 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG --check-prefix=FUNC
; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=CM --check-prefix=FUNC
; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC
; FUNC-LABEL: {{^}}i32_mul24:
; Signed 24-bit multiply is not supported on pre-Cayman GPUs.
Modified: llvm/trunk/test/CodeGen/R600/mul_uint24.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/mul_uint24.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/mul_uint24.ll (original)
+++ llvm/trunk/test/CodeGen/R600/mul_uint24.ll Tue Jan 27 11:27:15 2015
@@ -1,6 +1,7 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG --check-prefix=FUNC
; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=EG --check-prefix=FUNC
; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC
; FUNC-LABEL: {{^}}u32_mul24:
; EG: MUL_UINT24 {{[* ]*}}T{{[0-9]\.[XYZW]}}, KC0[2].Z, KC0[2].W
Modified: llvm/trunk/test/CodeGen/R600/mulhu.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/mulhu.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/mulhu.ll (original)
+++ llvm/trunk/test/CodeGen/R600/mulhu.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
;CHECK: v_mov_b32_e32 v{{[0-9]+}}, 0xaaaaaaab
;CHECK: v_mul_hi_u32 v0, {{v[0-9]+}}, {{s[0-9]+}}
Modified: llvm/trunk/test/CodeGen/R600/no-initializer-constant-addrspace.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/no-initializer-constant-addrspace.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/no-initializer-constant-addrspace.ll (original)
+++ llvm/trunk/test/CodeGen/R600/no-initializer-constant-addrspace.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -o /dev/null %s
+; RUN: llc -march=amdgcn -mcpu=tonga -o /dev/null %s
; RUN: llc -march=r600 -mcpu=cypress -o /dev/null %s
@extern_const_addrspace = external unnamed_addr addrspace(2) constant [5 x i32], align 4
Modified: llvm/trunk/test/CodeGen/R600/or.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/or.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/or.ll (original)
+++ llvm/trunk/test/CodeGen/R600/or.ll Tue Jan 27 11:27:15 2015
@@ -1,3 +1,4 @@
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
Modified: llvm/trunk/test/CodeGen/R600/private-memory-atomics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/private-memory-atomics.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/private-memory-atomics.ll (original)
+++ llvm/trunk/test/CodeGen/R600/private-memory-atomics.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI < %s
+; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=tonga < %s
; This works because promote allocas pass replaces these with LDS atomics.
Modified: llvm/trunk/test/CodeGen/R600/private-memory-broken.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/private-memory-broken.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/private-memory-broken.ll (original)
+++ llvm/trunk/test/CodeGen/R600/private-memory-broken.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: not llc -verify-machineinstrs -march=amdgcn -mcpu=SI %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: not llc -verify-machineinstrs -march=amdgcn -mcpu=tonga %s -o /dev/null 2>&1 | FileCheck %s
; Make sure promote alloca pass doesn't crash
Modified: llvm/trunk/test/CodeGen/R600/reorder-stores.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/reorder-stores.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/reorder-stores.ll (original)
+++ llvm/trunk/test/CodeGen/R600/reorder-stores.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI %s
; SI-LABEL: {{^}}no_reorder_v2f64_global_load_store:
; SI: buffer_load_dwordx2
Modified: llvm/trunk/test/CodeGen/R600/rotl.i64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/rotl.i64.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/rotl.i64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/rotl.i64.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}s_rotl_i64:
; SI-DAG: s_lshl_b64
Modified: llvm/trunk/test/CodeGen/R600/rotl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/rotl.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/rotl.ll (original)
+++ llvm/trunk/test/CodeGen/R600/rotl.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=R600 -check-prefix=FUNC %s
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}rotl_i32:
; R600: SUB_INT {{\** T[0-9]+\.[XYZW]}}, literal.x
Modified: llvm/trunk/test/CodeGen/R600/rotr.i64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/rotr.i64.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/rotr.i64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/rotr.i64.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}s_rotr_i64:
; SI-DAG: s_sub_i32
Modified: llvm/trunk/test/CodeGen/R600/rotr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/rotr.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/rotr.ll (original)
+++ llvm/trunk/test/CodeGen/R600/rotr.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=R600 -check-prefix=FUNC %s
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}rotr_i32:
; R600: BIT_ALIGN_INT
Modified: llvm/trunk/test/CodeGen/R600/s_movk_i32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/s_movk_i32.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/s_movk_i32.ll (original)
+++ llvm/trunk/test/CodeGen/R600/s_movk_i32.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
; SI-LABEL: {{^}}s_movk_i32_k0:
; SI-DAG: s_mov_b32 [[LO_S_IMM:s[0-9]+]], 0xffff{{$}}
Modified: llvm/trunk/test/CodeGen/R600/saddo.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/saddo.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/saddo.ll (original)
+++ llvm/trunk/test/CodeGen/R600/saddo.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs< %s
declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/scalar_to_vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/scalar_to_vector.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/scalar_to_vector.ll (original)
+++ llvm/trunk/test/CodeGen/R600/scalar_to_vector.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}scalar_to_vector_v2i32:
Modified: llvm/trunk/test/CodeGen/R600/schedule-vs-if-nested-loop-failure.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/schedule-vs-if-nested-loop-failure.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/schedule-vs-if-nested-loop-failure.ll (original)
+++ llvm/trunk/test/CodeGen/R600/schedule-vs-if-nested-loop-failure.ll Tue Jan 27 11:27:15 2015
@@ -1,6 +1,7 @@
; XFAIL: *
; REQUIRES: asserts
; RUN: llc -O0 -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck %s -check-prefix=SI
+; RUN: llc -O0 -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck %s -check-prefix=SI
declare void @llvm.AMDGPU.barrier.local() nounwind noduplicate
Modified: llvm/trunk/test/CodeGen/R600/sdiv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/sdiv.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/sdiv.ll (original)
+++ llvm/trunk/test/CodeGen/R600/sdiv.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
; The code generated by sdiv is long and complex and may frequently change.
Modified: llvm/trunk/test/CodeGen/R600/sdivrem24.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/sdivrem24.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/sdivrem24.ll (original)
+++ llvm/trunk/test/CodeGen/R600/sdivrem24.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}sdiv24_i8:
Modified: llvm/trunk/test/CodeGen/R600/select-i1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/select-i1.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/select-i1.ll (original)
+++ llvm/trunk/test/CodeGen/R600/select-i1.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; FIXME: This should go in existing select.ll test, except the current testcase there is broken on SI
Modified: llvm/trunk/test/CodeGen/R600/select-vectors.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/select-vectors.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/select-vectors.ll (original)
+++ llvm/trunk/test/CodeGen/R600/select-vectors.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; Test expansion of scalar selects on vectors.
; Evergreen not enabled since it seems to be having problems with doubles.
Modified: llvm/trunk/test/CodeGen/R600/select64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/select64.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/select64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/select64.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
; CHECK-LABEL: {{^}}select0:
; i64 select should be split into two i32 selects, and we shouldn't need
Modified: llvm/trunk/test/CodeGen/R600/selectcc-opt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/selectcc-opt.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/selectcc-opt.ll (original)
+++ llvm/trunk/test/CodeGen/R600/selectcc-opt.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
Modified: llvm/trunk/test/CodeGen/R600/selectcc.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/selectcc.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/selectcc.ll (original)
+++ llvm/trunk/test/CodeGen/R600/selectcc.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc -verify-machineinstrs -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}selectcc_i64:
; EG: XOR_INT
Modified: llvm/trunk/test/CodeGen/R600/setcc64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/setcc64.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/setcc64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/setcc64.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
;RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs| FileCheck --check-prefix=SI --check-prefix=FUNC %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs| FileCheck --check-prefix=SI --check-prefix=FUNC %s
; XXX: Merge this into setcc, once R600 supports 64-bit operations
Modified: llvm/trunk/test/CodeGen/R600/seto.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/seto.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/seto.ll (original)
+++ llvm/trunk/test/CodeGen/R600/seto.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s
; CHECK-LABEL: {{^}}main:
; CHECK: v_cmp_o_f32_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], [[SREG:s[0-9]+]], [[SREG]]
Modified: llvm/trunk/test/CodeGen/R600/setuo.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/setuo.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/setuo.ll (original)
+++ llvm/trunk/test/CodeGen/R600/setuo.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck %s
; CHECK-LABEL: {{^}}main:
; CHECK: v_cmp_u_f32_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], [[SREG:s[0-9]+]], [[SREG]]
Modified: llvm/trunk/test/CodeGen/R600/sgpr-copy-duplicate-operand.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/sgpr-copy-duplicate-operand.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/sgpr-copy-duplicate-operand.ll (original)
+++ llvm/trunk/test/CodeGen/R600/sgpr-copy-duplicate-operand.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s
; Copy VGPR -> SGPR used twice as an instruction operand, which is then
; used in an REG_SEQUENCE that also needs to be handled.
Modified: llvm/trunk/test/CodeGen/R600/sgpr-copy.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/sgpr-copy.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/sgpr-copy.ll (original)
+++ llvm/trunk/test/CodeGen/R600/sgpr-copy.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
; This test checks that no VGPR to SGPR copies are created by the register
; allocator.
Modified: llvm/trunk/test/CodeGen/R600/shl.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/shl.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/shl.ll (original)
+++ llvm/trunk/test/CodeGen/R600/shl.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
;EG-CHECK: {{^}}shl_v2i32:
;EG-CHECK: LSHL {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Modified: llvm/trunk/test/CodeGen/R600/shl_add_ptr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/shl_add_ptr.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/shl_add_ptr.ll (original)
+++ llvm/trunk/test/CodeGen/R600/shl_add_ptr.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck -check-prefix=SI %s
; Test that doing a shift of a pointer with a constant add will be
; folded into the constant offset addressing mode even if the add has
Modified: llvm/trunk/test/CodeGen/R600/si-annotate-cf-assertion.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/si-annotate-cf-assertion.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/si-annotate-cf-assertion.ll (original)
+++ llvm/trunk/test/CodeGen/R600/si-annotate-cf-assertion.ll Tue Jan 27 11:27:15 2015
@@ -1,6 +1,7 @@
; REQUIRES: asserts
; XFAIL: *
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs-asm-verbose=false < %s | FileCheck %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs-asm-verbose=false < %s | FileCheck %s
define void @test(i32 addrspace(1)* %g, i8 addrspace(3)* %l, i32 %x) nounwind {
Modified: llvm/trunk/test/CodeGen/R600/si-lod-bias.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/si-lod-bias.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/si-lod-bias.ll (original)
+++ llvm/trunk/test/CodeGen/R600/si-lod-bias.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
; This shader has the potential to generated illegal VGPR to SGPR copies if
; the wrong register class is used for the REG_SEQUENCE instructions.
Modified: llvm/trunk/test/CodeGen/R600/si-sgpr-spill.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/si-sgpr-spill.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/si-sgpr-spill.ll (original)
+++ llvm/trunk/test/CodeGen/R600/si-sgpr-spill.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck %s
+; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck %s
; These tests check that the compiler won't crash when it needs to spill
; SGPRs.
Modified: llvm/trunk/test/CodeGen/R600/si-vector-hang.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/si-vector-hang.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/si-vector-hang.ll (original)
+++ llvm/trunk/test/CodeGen/R600/si-vector-hang.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
; CHECK: {{^}}test_8_min_char:
; CHECK: buffer_store_byte
Modified: llvm/trunk/test/CodeGen/R600/sign_extend.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/sign_extend.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/sign_extend.ll (original)
+++ llvm/trunk/test/CodeGen/R600/sign_extend.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
; SI-LABEL: {{^}}s_sext_i1_to_i32:
; SI: v_cndmask_b32_e64
Modified: llvm/trunk/test/CodeGen/R600/simplify-demanded-bits-build-pair.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/simplify-demanded-bits-build-pair.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/simplify-demanded-bits-build-pair.ll (original)
+++ llvm/trunk/test/CodeGen/R600/simplify-demanded-bits-build-pair.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; XFAIL: *
; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI -mattr=-promote-alloca < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=tonga -mattr=-promote-alloca < %s | FileCheck -check-prefix=SI %s
; 64-bit select was originally lowered with a build_pair, and this
; could be simplified to 1 cndmask instead of 2, but that broken when
Modified: llvm/trunk/test/CodeGen/R600/sint_to_fp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/sint_to_fp.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/sint_to_fp.ll (original)
+++ llvm/trunk/test/CodeGen/R600/sint_to_fp.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
Modified: llvm/trunk/test/CodeGen/R600/sra.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/sra.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/sra.ll (original)
+++ llvm/trunk/test/CodeGen/R600/sra.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
;EG-CHECK-LABEL: {{^}}ashr_v2i32:
;EG-CHECK: ASHR {{\*? *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Modified: llvm/trunk/test/CodeGen/R600/srem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/srem.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/srem.ll (original)
+++ llvm/trunk/test/CodeGen/R600/srem.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood < %s
define void @srem_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
Modified: llvm/trunk/test/CodeGen/R600/ssubo.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/ssubo.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/ssubo.ll (original)
+++ llvm/trunk/test/CodeGen/R600/ssubo.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs< %s
declare { i32, i1 } @llvm.ssub.with.overflow.i32(i32, i32) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/store-v3i32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/store-v3i32.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/store-v3i32.ll (original)
+++ llvm/trunk/test/CodeGen/R600/store-v3i32.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; XFAIL: *
; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -verify-machineinstrs -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI %s
; 3 vectors have the same size and alignment as 4 vectors, so this
; should be done in a single store.
Modified: llvm/trunk/test/CodeGen/R600/store-v3i64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/store-v3i64.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/store-v3i64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/store-v3i64.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; XFAIL: *
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI
; SI-LABEL: {{^}}global_store_v3i64:
; SI: buffer_store_dwordx4
Modified: llvm/trunk/test/CodeGen/R600/store-vector-ptrs.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/store-vector-ptrs.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/store-vector-ptrs.ll (original)
+++ llvm/trunk/test/CodeGen/R600/store-vector-ptrs.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s
; This tests for a bug that caused a crash in
; AMDGPUDAGToDAGISel::SelectMUBUFScratch() which is used for selecting
Modified: llvm/trunk/test/CodeGen/R600/store.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/store.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/store.ll (original)
+++ llvm/trunk/test/CodeGen/R600/store.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI-CHECK -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI-CHECK -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG-CHECK -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=cayman < %s | FileCheck -check-prefix=CM-CHECK -check-prefix=FUNC %s
Modified: llvm/trunk/test/CodeGen/R600/subreg-coalescer-crash.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/subreg-coalescer-crash.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/subreg-coalescer-crash.ll (original)
+++ llvm/trunk/test/CodeGen/R600/subreg-coalescer-crash.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs -o - %s
+; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs -o - %s
; ModuleID = 'bugpoint-reduced-simplified.bc'
target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
target triple = "r600--"
Modified: llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll (original)
+++ llvm/trunk/test/CodeGen/R600/trunc-cmp-constant.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=r600 -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; FUNC-LABEL {{^}}sextload_i1_to_i32_trunc_cmp_eq_0:
; SI: buffer_load_ubyte [[LOAD:v[0-9]+]]
Modified: llvm/trunk/test/CodeGen/R600/trunc-store-i1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/trunc-store-i1.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/trunc-store-i1.ll (original)
+++ llvm/trunk/test/CodeGen/R600/trunc-store-i1.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s
; SI-LABEL: {{^}}global_truncstore_i32_to_i1:
Modified: llvm/trunk/test/CodeGen/R600/uaddo.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/uaddo.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/uaddo.ll (original)
+++ llvm/trunk/test/CodeGen/R600/uaddo.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs< %s
declare { i32, i1 } @llvm.uadd.with.overflow.i32(i32, i32) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/udiv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/udiv.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/udiv.ll (original)
+++ llvm/trunk/test/CodeGen/R600/udiv.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
;EG-CHECK-LABEL: {{^}}test:
;EG-CHECK-NOT: SETGE_INT
Modified: llvm/trunk/test/CodeGen/R600/udivrem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/udivrem.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/udivrem.ll (original)
+++ llvm/trunk/test/CodeGen/R600/udivrem.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck --check-prefix=SI --check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck --check-prefix=SI --check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=EG --check-prefix=FUNC %s
; FUNC-LABEL: {{^}}test_udivrem:
Modified: llvm/trunk/test/CodeGen/R600/udivrem24.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/udivrem24.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/udivrem24.ll (original)
+++ llvm/trunk/test/CodeGen/R600/udivrem24.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}udiv24_i8:
Modified: llvm/trunk/test/CodeGen/R600/udivrem64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/udivrem64.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/udivrem64.ll (original)
+++ llvm/trunk/test/CodeGen/R600/udivrem64.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
;RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck --check-prefix=SI --check-prefix=FUNC %s
+;RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck --check-prefix=SI --check-prefix=FUNC %s
;RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=EG --check-prefix=FUNC %s
;FUNC-LABEL: {{^}}test_udiv:
Modified: llvm/trunk/test/CodeGen/R600/uint_to_fp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/uint_to_fp.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/uint_to_fp.ll (original)
+++ llvm/trunk/test/CodeGen/R600/uint_to_fp.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}uint_to_fp_i32_to_f32:
Modified: llvm/trunk/test/CodeGen/R600/unaligned-load-store.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/unaligned-load-store.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/unaligned-load-store.ll (original)
+++ llvm/trunk/test/CodeGen/R600/unaligned-load-store.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI %s
; SI-LABEL: {{^}}unaligned_load_store_i32:
; SI: ds_read_u8
Modified: llvm/trunk/test/CodeGen/R600/unhandled-loop-condition-assertion.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/unhandled-loop-condition-assertion.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/unhandled-loop-condition-assertion.ll (original)
+++ llvm/trunk/test/CodeGen/R600/unhandled-loop-condition-assertion.ll Tue Jan 27 11:27:15 2015
@@ -1,6 +1,7 @@
; REQUIRES: asserts
; XFAIL: *
; RUN: llc -O0 -verify-machineinstrs -asm-verbose=0 -march=amdgcn -mcpu=SI < %s | FileCheck -check-prefix=SI -check-prefix=COMMON %s
+; RUN: llc -O0 -verify-machineinstrs -asm-verbose=0 -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=COMMON %s
; RUN: llc -O0 -verify-machineinstrs -asm-verbose=0 -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=COMMON %s
; SI hits an assertion at -O0, evergreen hits a not implemented unreachable.
Modified: llvm/trunk/test/CodeGen/R600/urecip.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/urecip.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/urecip.ll (original)
+++ llvm/trunk/test/CodeGen/R600/urecip.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s
;CHECK: v_rcp_iflag_f32_e32
Modified: llvm/trunk/test/CodeGen/R600/urem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/urem.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/urem.ll (original)
+++ llvm/trunk/test/CodeGen/R600/urem.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
; The code generated by urem is long and complex and may frequently
Modified: llvm/trunk/test/CodeGen/R600/usubo.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/usubo.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/usubo.ll (original)
+++ llvm/trunk/test/CodeGen/R600/usubo.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=cypress -verify-machineinstrs< %s
declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32) nounwind readnone
Modified: llvm/trunk/test/CodeGen/R600/v_cndmask.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/v_cndmask.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/v_cndmask.ll (original)
+++ llvm/trunk/test/CodeGen/R600/v_cndmask.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
declare i32 @llvm.r600.read.tidig.x() #1
Modified: llvm/trunk/test/CodeGen/R600/vector-alloca.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/vector-alloca.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/vector-alloca.ll (original)
+++ llvm/trunk/test/CodeGen/R600/vector-alloca.ll Tue Jan 27 11:27:15 2015
@@ -1,6 +1,8 @@
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck --check-prefix=EG -check-prefix=FUNC %s
; RUN: llc -march=amdgcn -mcpu=verde -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-ALLOCA -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=amdgcn -mcpu=verde -mattr=+promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-PROMOTE -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-ALLOCA -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefix=SI-PROMOTE -check-prefix=SI -check-prefix=FUNC %s
; FUNC-LABEL: {{^}}vector_read:
; EG: MOV
Modified: llvm/trunk/test/CodeGen/R600/vop-shrink.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/vop-shrink.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/vop-shrink.ll (original)
+++ llvm/trunk/test/CodeGen/R600/vop-shrink.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs< %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; Test that we correctly commute a sub instruction
; FUNC-LABEL: {{^}}sub_rev:
Modified: llvm/trunk/test/CodeGen/R600/vselect.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/vselect.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/vselect.ll (original)
+++ llvm/trunk/test/CodeGen/R600/vselect.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
;RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
+;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
;EG-CHECK: {{^}}test_select_v2i32:
;EG-CHECK: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Modified: llvm/trunk/test/CodeGen/R600/wait.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/wait.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/wait.ll (original)
+++ llvm/trunk/test/CodeGen/R600/wait.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -strict-whitespace %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -strict-whitespace %s
; CHECK-LABEL: {{^}}main:
; CHECK: s_load_dwordx4
Modified: llvm/trunk/test/CodeGen/R600/xor.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/xor.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/xor.ll (original)
+++ llvm/trunk/test/CodeGen/R600/xor.ll Tue Jan 27 11:27:15 2015
@@ -1,4 +1,5 @@
; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
+; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
Modified: llvm/trunk/test/CodeGen/R600/zero_extend.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/zero_extend.ll?rev=227214&r1=227213&r2=227214&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/zero_extend.ll (original)
+++ llvm/trunk/test/CodeGen/R600/zero_extend.ll Tue Jan 27 11:27:15 2015
@@ -1,5 +1,6 @@
; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
; RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK
+; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK
; R600-CHECK: {{^}}test:
; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW
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