[llvm] r226664 - AArch64: add backend option to reserve x18 (platform register)

Hans Wennborg hans at chromium.org
Mon Jan 26 15:06:00 PST 2015


On Mon, Jan 26, 2015 at 1:54 PM, Dimitry Andric <dimitry at andric.com> wrote:
> Hi Tim and Hans,
>
> Can we please get this revision (and its accompanying clang revision r227062) into the release_36 branch, targeting 3.6.0?

I'm fine with it if Tim is.

Thanks,
Hans


>> On 21 Jan 2015, at 16:43, Tim Northover <tnorthover at apple.com> wrote:
>>
>> Author: tnorthover
>> Date: Wed Jan 21 09:43:31 2015
>> New Revision: 226664
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=226664&view=rev
>> Log:
>> AArch64: add backend option to reserve x18 (platform register)
>>
>> AAPCS64 says that it's up to the platform to specify whether x18 is
>> reserved, and a first step on that way is to add a flag controlling
>> it.
>>
>> From: Andrew Turner <andrew at fubar.geek.nz>
>>
>> Modified:
>>    llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp
>>    llvm/trunk/test/CodeGen/AArch64/arm64-platform-reg.ll
>>
>> Modified: llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp?rev=226664&r1=226663&r2=226664&view=diff
>> ==============================================================================
>> --- llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp (original)
>> +++ llvm/trunk/lib/Target/AArch64/AArch64RegisterInfo.cpp Wed Jan 21 09:43:31 2015
>> @@ -33,6 +33,10 @@ using namespace llvm;
>> #define GET_REGINFO_TARGET_DESC
>> #include "AArch64GenRegisterInfo.inc"
>>
>> +static cl::opt<bool>
>> +ReserveX18("aarch64-reserve-x18", cl::Hidden,
>> +          cl::desc("Reserve X18, making it unavailable as GPR"));
>> +
>> AArch64RegisterInfo::AArch64RegisterInfo(const AArch64InstrInfo *tii,
>>                                          const AArch64Subtarget *sti)
>>     : AArch64GenRegisterInfo(AArch64::LR), TII(tii), STI(sti) {}
>> @@ -98,7 +102,7 @@ AArch64RegisterInfo::getReservedRegs(con
>>     Reserved.set(AArch64::W29);
>>   }
>>
>> -  if (STI->isTargetDarwin()) {
>> +  if (STI->isTargetDarwin() || ReserveX18) {
>>     Reserved.set(AArch64::X18); // Platform register
>>     Reserved.set(AArch64::W18);
>>   }
>> @@ -125,7 +129,7 @@ bool AArch64RegisterInfo::isReservedReg(
>>     return true;
>>   case AArch64::X18:
>>   case AArch64::W18:
>> -    return STI->isTargetDarwin();
>> +    return STI->isTargetDarwin() || ReserveX18;
>>   case AArch64::FP:
>>   case AArch64::W29:
>>     return TFI->hasFP(MF) || STI->isTargetDarwin();
>> @@ -387,7 +391,7 @@ unsigned AArch64RegisterInfo::getRegPres
>>   case AArch64::GPR64commonRegClassID:
>>     return 32 - 1                                      // XZR/SP
>>            - (TFI->hasFP(MF) || STI->isTargetDarwin()) // FP
>> -           - STI->isTargetDarwin() // X18 reserved as platform register
>> +           - (STI->isTargetDarwin() || ReserveX18) // X18 reserved as platform register
>>            - hasBasePointer(MF);   // X19
>>   case AArch64::FPR8RegClassID:
>>   case AArch64::FPR16RegClassID:
>>
>> Modified: llvm/trunk/test/CodeGen/AArch64/arm64-platform-reg.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-platform-reg.ll?rev=226664&r1=226663&r2=226664&view=diff
>> ==============================================================================
>> --- llvm/trunk/test/CodeGen/AArch64/arm64-platform-reg.ll (original)
>> +++ llvm/trunk/test/CodeGen/AArch64/arm64-platform-reg.ll Wed Jan 21 09:43:31 2015
>> @@ -1,4 +1,5 @@
>> -; RUN: llc -mtriple=arm64-apple-ios -o - %s | FileCheck %s --check-prefix=CHECK-DARWIN
>> +; RUN: llc -mtriple=arm64-apple-ios -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18
>> +; RUN: llc -mtriple=arm64-freebsd-gnu -aarch64-reserve-x18 -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18
>> ; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s
>>
>> ; x18 is reserved as a platform register on Darwin but not on other
>> @@ -16,11 +17,11 @@ define void @keep_live() {
>> ; CHECK: ldr x18
>> ; CHECK: str x18
>>
>> -; CHECK-DARWIN-NOT: ldr fp
>> -; CHECK-DARWIN-NOT: ldr x18
>> -; CHECK-DARWIN: Spill
>> -; CHECK-DARWIN-NOT: ldr fp
>> -; CHECK-DARWIN-NOT: ldr x18
>> -; CHECK-DARWIN: ret
>> +; CHECK-RESERVE-X18-NOT: ldr fp
>> +; CHECK-RESERVE-X18-NOT: ldr x18
>> +; CHECK-RESERVE-X18: Spill
>> +; CHECK-RESERVE-X18-NOT: ldr fp
>> +; CHECK-RESERVE-X18-NOT: ldr x18
>> +; CHECK-RESERVE-X18: ret
>>   ret void
>> }
>>
>>
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