[PATCH] [ARM] Fix issue with SMLAL (Signed Multiply Accumulate Long) lowering

[Tim Northover]

Hi Jyoti,

Thanks for updating the patch, but I don't think the logic is quite there yet:


================
Comment at: ../llvm/lib/Target/ARM/ARMISelLowering.cpp:8085
@@ -8084,1 +8084,3 @@
+
+  if (AddcOp1 == MULOp.getValue(1)) {
     LoMul = &AddcOp1;
----------------
I think you've misunderstood. Addc should always refer to the 0 (low) value of MUL_LOHI. We also need to check that Adde always refers to the 1 (high) value.

E.g.

    #include <stdint.h>
    
    uint64_t foo(uint64_t acc, uint32_t lhs, uint32_t rhs) {
      uint64_t prod = (uint64_t)lhs * rhs;
      uint64_t weird_in = (prod & 0xffffffffULL) | ((prod & 0xffffffffULL) << 32);
      return acc + prod_weird;
    }

http://reviews.llvm.org/D6998

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