[llvm] r226647 - [x86] Remove some unnecessary and slightly confusing typecasts from some patterns. I think it actually went i32->iPtr->i32 in some of these cases.

Craig Topper craig.topper at gmail.com
Wed Jan 21 00:43:58 PST 2015


Author: ctopper
Date: Wed Jan 21 02:43:57 2015
New Revision: 226647

URL: http://llvm.org/viewvc/llvm-project?rev=226647&view=rev
Log:
[x86] Remove some unnecessary and slightly confusing typecasts from some patterns. I think it actually went i32->iPtr->i32 in some of these cases.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrMMX.td

Modified: llvm/trunk/lib/Target/X86/X86InstrMMX.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrMMX.td?rev=226647&r1=226646&r2=226647&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrMMX.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrMMX.td Wed Jan 21 02:43:57 2015
@@ -127,7 +127,7 @@ let Constraints = "$src1 = $dst" in {
     def ri : MMXIi8<opc2, ImmForm, (outs VR64:$dst),
                                    (ins VR64:$src1, i32i8imm:$src2),
                     !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
-           [(set VR64:$dst, (IntId2 VR64:$src1, (i32 imm:$src2)))], itins.ri>,
+           [(set VR64:$dst, (IntId2 VR64:$src1, imm:$src2))], itins.ri>,
            Sched<[WriteVecShift]>;
   }
 }
@@ -562,7 +562,7 @@ def MMX_PEXTRWirri: MMXIi8<0xC5, MRMSrcR
                        (outs GR32orGR64:$dst), (ins VR64:$src1, i32i8imm:$src2),
                        "pextrw\t{$src2, $src1, $dst|$dst, $src1, $src2}",
                        [(set GR32orGR64:$dst, (int_x86_mmx_pextr_w VR64:$src1,
-                                         (iPTR imm:$src2)))],
+                                               imm:$src2))],
                        IIC_MMX_PEXTR>, Sched<[WriteShuffle]>;
 let Constraints = "$src1 = $dst" in {
   def MMX_PINSRWirri : MMXIi8<0xC4, MRMSrcReg,
@@ -570,7 +570,7 @@ let Constraints = "$src1 = $dst" in {
                       (ins VR64:$src1, GR32orGR64:$src2, i32i8imm:$src3),
                       "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}",
                       [(set VR64:$dst, (int_x86_mmx_pinsr_w VR64:$src1,
-                                        GR32orGR64:$src2, (iPTR imm:$src3)))],
+                                        GR32orGR64:$src2, imm:$src3))],
                       IIC_MMX_PINSRW>, Sched<[WriteShuffle]>;
 
   def MMX_PINSRWirmi : MMXIi8<0xC4, MRMSrcMem,
@@ -579,7 +579,7 @@ let Constraints = "$src1 = $dst" in {
                      "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}",
                      [(set VR64:$dst, (int_x86_mmx_pinsr_w VR64:$src1,
                                          (i32 (anyext (loadi16 addr:$src2))),
-                                       (iPTR imm:$src3)))],
+                                       imm:$src3))],
                      IIC_MMX_PINSRW>, Sched<[WriteShuffleLd, ReadAfterLd]>;
 }
 





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