[PATCH] [X86] Declare SSE4.1/AVX2 vector extloads covered by the *PMOV*X instructions legal

Ahmed Bougacha ahmed.bougacha at gmail.com
Tue Jan 20 14:35:14 PST 2015


So there are already testcases (vector-sext/zext.ll).

The endgoal here is to avoid having multiple ways to express extloads (see http://reviews.llvm.org/D6896).  Saying these extloads are legal is the first step, and enables the DAGCombines to catch the stupid "(and (zextload))" pattern, as seen in the two tests here.

Thanks for the review!
-Ahmed


================
Comment at: test/CodeGen/X86/widen_load-2.ll:195
@@ +194,3 @@
+; CHECK-NEXT:    movl    (%[[PTR0]]), [[TMP1:%e[abcd]+x]]
+; CHECK-NEXT:    movl    [[TMP1]], [[TMP2:.*]]
+; CHECK-NEXT:    pmovzxbd [[TMP2]], %[[X0:xmm[0-9]+]]
----------------
qcolombet wrote:
> Why do we need two moves here?
We don't; addressed separately in D6552.

http://reviews.llvm.org/D6533

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