[PATCH] [v7] BPF backend

David Majnemer david.majnemer at gmail.com
Mon Jan 19 20:21:41 PST 2015


================
Comment at: lib/Target/BPF/BPFISelLowering.cpp:261-263
@@ +260,5 @@
+  SelectionDAG &DAG = CLI.DAG;
+  SmallVector<ISD::OutputArg, 32> &Outs = CLI.Outs;
+  SmallVector<SDValue, 32> &OutVals = CLI.OutVals;
+  SmallVector<ISD::InputArg, 32> &Ins = CLI.Ins;
+  SDValue Chain = CLI.Chain;
----------------
Any reason these `SmallVector`s can't be `SmallVectorImpl` ?

================
Comment at: lib/Target/BPF/BPFISelLowering.cpp:296
@@ +295,3 @@
+
+  for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
+    ISD::ArgFlagsTy Flags = Outs[i].Flags;
----------------
Would a range-based for loop be more concise?

================
Comment at: lib/Target/BPF/BPFISelLowering.cpp:345
@@ +344,3 @@
+  // necessary since all emitted instructions must be stuck together.
+  for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
+    Chain = DAG.getCopyToReg(Chain, CLI.DL, RegsToPass[i].first,
----------------
Would a range-based for loop be more concise?

================
Comment at: lib/Target/BPF/BPFISelLowering.cpp:362
@@ +361,3 @@
+  SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
+  SmallVector<SDValue, 8> Ops;
+  Ops.push_back(Chain);
----------------
Consider reserving `RegsToPass.size() + 3` elements to reduce the number of allocations.

================
Comment at: lib/Target/BPF/BPFISelLowering.cpp:368-370
@@ +367,5 @@
+  // known live into the call.
+  for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i)
+    Ops.push_back(DAG.getRegister(RegsToPass[i].first,
+                                  RegsToPass[i].second.getValueType()));
+
----------------
Would a range-based for loop be more concise?

================
Comment at: lib/Target/BPF/BPFISelLowering.cpp:417
@@ +416,3 @@
+  // Copy the result values into the output registers.
+  for (unsigned i = 0; i != RVLocs.size(); ++i) {
+    CCValAssign &VA = RVLocs[i];
----------------
Would a range-based for loop be more concise?

================
Comment at: lib/Target/BPF/BPFISelLowering.cpp:458
@@ +457,3 @@
+  // Copy all of the result registers out of their specified physreg.
+  for (unsigned i = 0; i != RVLocs.size(); ++i) {
+    Chain = DAG.getCopyFromReg(Chain, DL, RVLocs[i].getLocReg(),
----------------
Would a range-based for loop be more concise?

================
Comment at: lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp:71
@@ +70,3 @@
+  assert(Fixup.getKind() == FK_PCRel_2);
+  *(uint16_t *)&Data[Fixup.getOffset() + 2] = (uint16_t)((Value - 8) / 8);
+}
----------------
Is this code independent of endianness?

================
Comment at: test/CodeGen/BPF/alu8.ll:36-38
@@ +35,5 @@
+; CHECK: xori r2, -1 # encoding: [0xa7,0x02,0x00,0x00,0xff,0xff,0xff,0xff]
+        %1 = xor i8 %b, -1
+        %2 = and i8 %a, %1
+        ret i8 %2
+}
----------------
Can the leading whitespace of these instructions match the style of the surrounding test case?

http://reviews.llvm.org/D6494

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