[PATCH] R600/SI: Try to form (f64 [s|u]int_to_fp i1)

[Matt Arsenault]

This is un-optimized by the DAG combiner now to avoid
the from-i1 conversion. We get slightly better code
by doing this than materializing the weird constants
since there is no 64-bit select which end up getting split
up. The expanded pattern also shows up in fceil / ffloor
lowering.

http://reviews.llvm.org/D6970

Files:
  lib/Target/R600/SIISelLowering.cpp
  test/CodeGen/R600/fceil64.ll
  test/CodeGen/R600/ffloor.ll
  test/CodeGen/R600/sint_to_fp.f64.ll
  test/CodeGen/R600/uint_to_fp.f64.ll

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