[PATCH] Masked load/store for types that require legalization.
Elena Demikhovsky
elena.demikhovsky at intel.com
Wed Jan 14 06:14:55 PST 2015
Hi nadav, aschwaighofer, mzolotukhin, steven_wu,
In this big patch I'm solving two things. (If you'll say that it is too big and not reviewable, I'll spit into two, but this things are connected)
1. The current lowering of masked load/store for <2 x i32> and <2 x f32> is incorrect, and I'm solving this in type legalizer and subsequent "combine" in X86.
2. I added the cost estimation for masked operations that shows that
(1) masked load/store for these vector types are very expensive ( due to expanding loads and truncating stores )
(2) maskmov operation itself is not as cheap as vector load-store.
REPOSITORY
rL LLVM
http://reviews.llvm.org/D6966
Files:
include/llvm/Analysis/TargetTransformInfo.h
include/llvm/CodeGen/SelectionDAG.h
include/llvm/CodeGen/SelectionDAGNodes.h
lib/Analysis/TargetTransformInfo.cpp
lib/CodeGen/BasicTargetTransformInfo.cpp
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
lib/CodeGen/SelectionDAG/LegalizeTypes.h
lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86TargetTransformInfo.cpp
lib/Transforms/Vectorize/LoopVectorize.cpp
test/Analysis/CostModel/X86/masked-intrinsic-cost.ll
test/CodeGen/X86/masked_memop.ll
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