[llvm] r225941 - X86: validate 'int' instruction
Saleem Abdulrasool
compnerd at compnerd.org
Tue Jan 13 21:10:21 PST 2015
Author: compnerd
Date: Tue Jan 13 23:10:21 2015
New Revision: 225941
URL: http://llvm.org/viewvc/llvm-project?rev=225941&view=rev
Log:
X86: validate 'int' instruction
The int instruction takes as an operand an 8-bit immediate value. Validate that
the input is valid rather than silently truncating the value.
Added:
llvm/trunk/test/MC/X86/validate-inst-att.s
llvm/trunk/test/MC/X86/validate-inst-intel.s
Modified:
llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=225941&r1=225940&r2=225941&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Tue Jan 13 23:10:21 2015
@@ -684,6 +684,7 @@ private:
bool ParseDirectiveWord(unsigned Size, SMLoc L);
bool ParseDirectiveCode(StringRef IDVal, SMLoc L);
+ bool validateInstruction(MCInst &Inst, const OperandVector &Ops);
bool processInstruction(MCInst &Inst, const OperandVector &Ops);
/// Wrapper around MCStreamer::EmitInstruction(). Possibly adds
@@ -2272,6 +2273,20 @@ static bool convert64i32to64ri8(MCInst &
return convertToSExti8(Inst, Opcode, X86::RAX, isCmp);
}
+bool X86AsmParser::validateInstruction(MCInst &Inst, const OperandVector &Ops) {
+ switch (Inst.getOpcode()) {
+ default: return true;
+ case X86::INT:
+ assert(Inst.getOperand(0).isImm() && "expected immediate");
+ if (Inst.getOperand(0).getImm() > 255) {
+ Error(Ops[1]->getStartLoc(), "interrupt vector must be in range [0-255]");
+ return false;
+ }
+ return true;
+ }
+ llvm_unreachable("handle the instruction appropriately");
+}
+
bool X86AsmParser::processInstruction(MCInst &Inst, const OperandVector &Ops) {
switch (Inst.getOpcode()) {
default: return false;
@@ -2434,6 +2449,9 @@ bool X86AsmParser::MatchAndEmitATTInstru
isParsingIntelSyntax())) {
default: llvm_unreachable("Unexpected match result!");
case Match_Success:
+ if (!validateInstruction(Inst, Operands))
+ return true;
+
// Some instructions need post-processing to, for example, tweak which
// encoding is selected. Loop on it while changes happen so the
// individual transformations can chain off each other.
@@ -2677,6 +2695,9 @@ bool X86AsmParser::MatchAndEmitIntelInst
unsigned NumSuccessfulMatches =
std::count(std::begin(Match), std::end(Match), Match_Success);
if (NumSuccessfulMatches == 1) {
+ if (!validateInstruction(Inst, Operands))
+ return true;
+
// Some instructions need post-processing to, for example, tweak which
// encoding is selected. Loop on it while changes happen so the individual
// transformations can chain off each other.
Added: llvm/trunk/test/MC/X86/validate-inst-att.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/validate-inst-att.s?rev=225941&view=auto
==============================================================================
--- llvm/trunk/test/MC/X86/validate-inst-att.s (added)
+++ llvm/trunk/test/MC/X86/validate-inst-att.s Tue Jan 13 23:10:21 2015
@@ -0,0 +1,7 @@
+# RUN: not llvm-mc -triple i686 -filetype asm -o /dev/null %s 2>&1 | FileCheck %s
+
+ .text
+ int $65535
+# CHECK: error: interrupt vector must be in range [0-255]
+# CHECK: int $65535
+# CHECK: ^
Added: llvm/trunk/test/MC/X86/validate-inst-intel.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/validate-inst-intel.s?rev=225941&view=auto
==============================================================================
--- llvm/trunk/test/MC/X86/validate-inst-intel.s (added)
+++ llvm/trunk/test/MC/X86/validate-inst-intel.s Tue Jan 13 23:10:21 2015
@@ -0,0 +1,9 @@
+# RUN: not llvm-mc -x86-asm-syntax intel -triple i686 -filetype asm -o /dev/null %s 2>&1 \
+# RUN: | FileCheck %s
+
+ .text
+ int 65535
+# CHECK: error: interrupt vector must be in range [0-255]
+# CHECK: int 65535
+# CHECK: ^
+
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