[llvm] r225584 - [PowerPC] Mark zext of a small scalar load as free
Hal Finkel
hfinkel at anl.gov
Sat Jan 10 00:22:00 PST 2015
Author: hfinkel
Date: Sat Jan 10 02:21:59 2015
New Revision: 225584
URL: http://llvm.org/viewvc/llvm-project?rev=225584&view=rev
Log:
[PowerPC] Mark zext of a small scalar load as free
This initial implementation of PPCTargetLowering::isZExtFree marks as free
zexts of small scalar loads (that are not sign-extending). This callback is
used by SelectionDAGBuilder's RegsForValue::getCopyToRegs, and thus to
determine whether a zext or an anyext is used to lower illegally-typed PHIs.
Because later truncates of zero-extended values are nops, this allows for the
elimination of later unnecessary truncations.
Fixes the initial complaint associated with PR22120.
Added:
llvm/trunk/test/CodeGen/PowerPC/zext-free.ll
Modified:
llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h
Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=225584&r1=225583&r2=225584&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Sat Jan 10 02:21:59 2015
@@ -9780,6 +9780,26 @@ bool PPCTargetLowering::isTruncateFree(E
return NumBits1 == 64 && NumBits2 == 32;
}
+bool PPCTargetLowering::isZExtFree(SDValue Val, EVT VT2) const {
+ // Generally speaking, zexts are not free, but they are free when they can be
+ // folded with other operations.
+ if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Val)) {
+ EVT MemVT = LD->getMemoryVT();
+ if ((MemVT == MVT::i1 || MemVT == MVT::i8 || MemVT == MVT::i16 ||
+ (Subtarget.isPPC64() && MemVT == MVT::i32)) &&
+ (LD->getExtensionType() == ISD::NON_EXTLOAD ||
+ LD->getExtensionType() == ISD::ZEXTLOAD))
+ return true;
+ }
+
+ // FIXME: Add other cases...
+ // - 32-bit shifts with a zext to i64
+ // - zext after ctlz, bswap, etc.
+ // - zext after and by a constant mask
+
+ return TargetLowering::isZExtFree(Val, VT2);
+}
+
bool PPCTargetLowering::isLegalICmpImmediate(int64_t Imm) const {
return isInt<16>(Imm) || isUInt<16>(Imm);
}
Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h?rev=225584&r1=225583&r2=225584&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h Sat Jan 10 02:21:59 2015
@@ -526,6 +526,8 @@ namespace llvm {
bool isTruncateFree(Type *Ty1, Type *Ty2) const override;
bool isTruncateFree(EVT VT1, EVT VT2) const override;
+ bool isZExtFree(SDValue Val, EVT VT2) const override;
+
/// \brief Returns true if it is beneficial to convert a load of a constant
/// to just the constant itself.
bool shouldConvertConstantLoadToIntImm(const APInt &Imm,
Added: llvm/trunk/test/CodeGen/PowerPC/zext-free.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/zext-free.ll?rev=225584&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/zext-free.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/zext-free.ll Sat Jan 10 02:21:59 2015
@@ -0,0 +1,37 @@
+; RUN: llc -mcpu=ppc64 < %s | FileCheck %s
+target datalayout = "E-m:e-i64:64-n32:64"
+target triple = "powerpc64-unknown-linux-gnu"
+
+; Function Attrs: noreturn nounwind
+define signext i32 @_Z1fRPc(i8** nocapture dereferenceable(8) %p) #0 {
+entry:
+ %.pre = load i8** %p, align 8
+ br label %loop
+
+loop: ; preds = %loop.backedge, %entry
+ %0 = phi i8* [ %.pre, %entry ], [ %.be, %loop.backedge ]
+ %1 = load i8* %0, align 1
+ %tobool = icmp eq i8 %1, 0
+ %incdec.ptr = getelementptr inbounds i8* %0, i64 1
+ store i8* %incdec.ptr, i8** %p, align 8
+ %2 = load i8* %incdec.ptr, align 1
+ %tobool2 = icmp ne i8 %2, 0
+ %or.cond = and i1 %tobool, %tobool2
+ br i1 %or.cond, label %if.then3, label %loop.backedge
+
+if.then3: ; preds = %loop
+ %incdec.ptr4 = getelementptr inbounds i8* %0, i64 2
+ store i8* %incdec.ptr4, i8** %p, align 8
+ br label %loop.backedge
+
+loop.backedge: ; preds = %if.then3, %loop
+ %.be = phi i8* [ %incdec.ptr4, %if.then3 ], [ %incdec.ptr, %loop ]
+ br label %loop
+
+; CHECK-LABEL: @_Z1fRPc
+; CHECK-NOT: rlwinm {{[0-9]+}}, {{[0-9]+}}, 0, 24, 31
+; CHECK-NOT: clrlwi {{[0-9]+}}, {{[0-9]+}}, 24
+}
+
+attributes #0 = { noreturn nounwind }
+
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