[llvm] r225492 - [DAGCombine] Remainder of fix to r225380 (More FMA folding opportunities)

[Hal Finkel]

Author: hfinkel
Date: Thu Jan  8 19:29:29 2015
New Revision: 225492

URL: http://llvm.org/viewvc/llvm-project?rev=225492&view=rev
Log:
[DAGCombine] Remainder of fix to r225380 (More FMA folding opportunities)

As pointed out by Aditya (and Owen), when we elide an FP extend to form an FMA,
we need to extend the incoming operands so that the resulting node will really
be legal. This is currently enabled only for PowerPC, and it happens to work
there regardless, but this should fix the functionality for everyone else
should anyone else wish to use it.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=225492&r1=225491&r2=225492&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Thu Jan  8 19:29:29 2015
@@ -6928,7 +6928,10 @@ SDValue DAGCombiner::visitFADD(SDNode *N
         SDValue N00 = N0.getOperand(0);
         if (N00.getOpcode() == ISD::FMUL)
           return DAG.getNode(ISD::FMA, SDLoc(N), VT,
-                             N00.getOperand(0), N00.getOperand(1), N1);
+                             DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT,
+                                         N00.getOperand(0)),
+                             DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT,
+                                         N00.getOperand(1)), N1);
       }
 
       // fold (fadd x, (fpext (fmul y, z)), z) -> (fma y, z, x)
@@ -6937,7 +6940,10 @@ SDValue DAGCombiner::visitFADD(SDNode *N
         SDValue N10 = N1.getOperand(0);
         if (N10.getOpcode() == ISD::FMUL)
           return DAG.getNode(ISD::FMA, SDLoc(N), VT,
-                             N10.getOperand(0), N10.getOperand(1), N0);
+                             DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT,
+                                         N10.getOperand(0)),
+                             DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT,
+                                         N10.getOperand(1)), N0);
       }
     }
   }
@@ -7073,8 +7079,10 @@ SDValue DAGCombiner::visitFSUB(SDNode *N
         SDValue N00 = N0.getOperand(0);
         if (N00.getOpcode() == ISD::FMUL)
           return DAG.getNode(ISD::FMA, SDLoc(N), VT,
-                             N00.getOperand(0),
-                             N00.getOperand(1),
+                             DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT,
+                                         N00.getOperand(0)),
+                             DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT,
+                                         N00.getOperand(1)),
                              DAG.getNode(ISD::FNEG, SDLoc(N), VT, N1));
       }
 
@@ -7085,8 +7093,10 @@ SDValue DAGCombiner::visitFSUB(SDNode *N
         if (N10.getOpcode() == ISD::FMUL)
           return DAG.getNode(ISD::FMA, SDLoc(N), VT,
                              DAG.getNode(ISD::FNEG, SDLoc(N), VT,
-                                         N10.getOperand(0)),
-                             N10.getOperand(1),
+                                         DAG.getNode(ISD::FP_EXTEND, SDLoc(N),
+                                                     VT, N10.getOperand(0))),
+                             DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT,
+                                         N10.getOperand(1)),
                              N0);
       }
 
@@ -7099,8 +7109,10 @@ SDValue DAGCombiner::visitFSUB(SDNode *N
           if (N000.getOpcode() == ISD::FMUL) {
             return DAG.getNode(ISD::FMA, dl, VT,
                                DAG.getNode(ISD::FNEG, dl, VT,
-                                           N000.getOperand(0)),
-                               N000.getOperand(1),
+                                           DAG.getNode(ISD::FP_EXTEND, SDLoc(N),
+                                                       VT, N000.getOperand(0))),
+                               DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT,
+                                           N000.getOperand(1)),
                                DAG.getNode(ISD::FNEG, dl, VT, N1));
           }
         }
@@ -7115,8 +7127,10 @@ SDValue DAGCombiner::visitFSUB(SDNode *N
           if (N000.getOpcode() == ISD::FMUL) {
             return DAG.getNode(ISD::FMA, dl, VT,
                                DAG.getNode(ISD::FNEG, dl, VT,
-                                           N000.getOperand(0)),
-                               N000.getOperand(1),
+                                           DAG.getNode(ISD::FP_EXTEND, SDLoc(N),
+                                           VT, N000.getOperand(0))),
+                               DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT,
+                                           N000.getOperand(1)),
                                DAG.getNode(ISD::FNEG, dl, VT, N1));
           }
         }