PATCHES: R600/SI: Remove SelectionDAG operand folding
Tom Stellard
tom at stellard.net
Tue Jan 6 10:56:48 PST 2015
On Fri, Dec 19, 2014 at 11:14:57AM -0500, Matt Arsenault wrote:
>
> On 12/18/2014 08:02 PM, Tom Stellard wrote:
> > Hi,
> >
> > This series of patches removes the legacy operand folding that was done on
> > the SelectionDAG. The SIFoldOperands MachineInstr pass now provides the
> > same functionality.
> >
> > -Tom
> >
> >
> > 0006-R600-SI-Add-a-V_MOV_B64-pseudo-instruction.patch
> >
> >
> > From 8ff850ac46ab082a06882e743946297c2791d6e3 Mon Sep 17 00:00:00 2001
> > From: Tom Stellard<thomas.stellard at amd.com>
> > Date: Wed, 17 Dec 2014 16:35:19 -0500
> > Subject: [PATCH 6/7] R600/SI: Add a V_MOV_B64 pseudo instruction
> >
> > This is used to simplify the SIFoldOperands pass and make it easier to
> > fold immediates.
> > ---
> > lib/Target/R600/SIFoldOperands.cpp | 3 +++
> > lib/Target/R600/SIInstrInfo.cpp | 29 +++++++++++++++++++++++++++
> > lib/Target/R600/SIInstructions.td | 6 ++++++
> > test/CodeGen/R600/atomic_cmp_swap_local.ll | 10 ++++------
> > test/CodeGen/R600/imm.ll | 7 ++-----
> > test/CodeGen/R600/local-atomics64.ll | 32 ++++++++++++------------------
> > 6 files changed, 57 insertions(+), 30 deletions(-)
>
> I thought you were avoiding this with the previous patch? Does the pass
> handle constants specially and this is for SGPRs only?
>
This patch is required to handle this case:
%vreg0 = S_MOV_B64 1 SReg_64:%vreg0
%vreg1 = COPY %vreg0 VReg_64:%vreg1, SReg_64:%vreg0j
%vreg2 = V_ADD_I32 %vreg1:sub0, ...
%vreg3 = V_ADDC_I32 %vreg1:sub1, ..
We can't fold the immediate through the copy, so we need to replace the
copy with V_MOV_B64.
Here are updated patches.
-Tom
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