[llvm] r225205 - [PowerPC] Add another test for load/store with update
Hal Finkel
hfinkel at anl.gov
Mon Jan 5 13:22:42 PST 2015
Author: hfinkel
Date: Mon Jan 5 15:22:42 2015
New Revision: 225205
URL: http://llvm.org/viewvc/llvm-project?rev=225205&view=rev
Log:
[PowerPC] Add another test for load/store with update
We now produce the desired code as noted in the README.txt file. Remove the
README entry and add a regression test.
Added:
llvm/trunk/test/CodeGen/PowerPC/ld-st-upd.ll
Modified:
llvm/trunk/lib/Target/PowerPC/README.txt
Modified: llvm/trunk/lib/Target/PowerPC/README.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/README.txt?rev=225205&r1=225204&r2=225205&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/README.txt (original)
+++ llvm/trunk/lib/Target/PowerPC/README.txt Mon Jan 5 15:22:42 2015
@@ -31,40 +31,6 @@ Ick.
===-------------------------------------------------------------------------===
-Support 'update' load/store instructions. These are cracked on the G5, but are
-still a codesize win.
-
-With preinc enabled, this:
-
-long *%test4(long *%X, long *%dest) {
- %Y = getelementptr long* %X, int 4
- %A = load long* %Y
- store long %A, long* %dest
- ret long* %Y
-}
-
-compiles to:
-
-_test4:
- mr r2, r3
- lwzu r5, 32(r2)
- lwz r3, 36(r3)
- stw r5, 0(r4)
- stw r3, 4(r4)
- mr r3, r2
- blr
-
-with -sched=list-burr, I get:
-
-_test4:
- lwz r2, 36(r3)
- lwzu r5, 32(r3)
- stw r2, 4(r4)
- stw r5, 0(r4)
- blr
-
-===-------------------------------------------------------------------------===
-
We compile the hottest inner loop of viterbi to:
li r6, 0
Added: llvm/trunk/test/CodeGen/PowerPC/ld-st-upd.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/ld-st-upd.ll?rev=225205&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/ld-st-upd.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/ld-st-upd.ll Mon Jan 5 15:22:42 2015
@@ -0,0 +1,19 @@
+; RUN: llc -mcpu=pwr7 < %s | FileCheck %s
+target datalayout = "E-m:e-i64:64-n32:64"
+target triple = "powerpc-unknown-linux-gnu"
+
+; Function Attrs: nounwind
+define i32* @test4(i32* readonly %X, i32* nocapture %dest) #0 {
+ %Y = getelementptr i32* %X, i64 4
+ %A = load i32* %Y, align 4
+ store i32 %A, i32* %dest, align 4
+ ret i32* %Y
+
+; CHECK-LABEL: @test4
+; CHECK: lwzu [[REG1:[0-9]+]], 16(3)
+; CHECK: stw [[REG1]], 0(4)
+; CHECK: blr
+}
+
+attributes #0 = { nounwind }
+
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