[llvm] r225043 - [Hexagon] Changing an llvm_unreachable to an assertion and returning 0. Relocations aren't implemented yet but we don't need to abort for this in release builds.

[Colin LeMahieu]

Author: colinl
Date: Wed Dec 31 09:57:38 2014
New Revision: 225043

URL: http://llvm.org/viewvc/llvm-project?rev=225043&view=rev
Log:
[Hexagon] Changing an llvm_unreachable to an assertion and returning 0.  Relocations aren't implemented yet but we don't need to abort for this in release builds.

Modified:
    llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp

Modified: llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp?rev=225043&r1=225042&r2=225043&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp Wed Dec 31 09:57:38 2014
@@ -71,7 +71,8 @@ HexagonMCCodeEmitter::getMachineOpValue(
     return MCT.getRegisterInfo()->getEncodingValue(MO.getReg());
   if (MO.isImm())
     return static_cast<unsigned>(MO.getImm());
-  llvm_unreachable("Only Immediates and Registers implemented right now");
+  assert(false && "Only Immediates and Registers implemented right now");
+  return 0;
 }
 
 MCSubtargetInfo const &HexagonMCCodeEmitter::getSubtargetInfo() const {