[llvm] r224955 - [Hexagon] Fixing 224952 where an addressing mode update was missed.

[Colin LeMahieu]

Author: colinl
Date: Mon Dec 29 15:18:02 2014
New Revision: 224955

URL: http://llvm.org/viewvc/llvm-project?rev=224955&view=rev
Log:
[Hexagon] Fixing 224952 where an addressing mode update was missed.

Modified:
    llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.td

Modified: llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.td?rev=224955&r1=224954&r2=224955&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Hexagon/HexagonInstrInfo.td Mon Dec 29 15:18:02 2014
@@ -4124,7 +4124,7 @@ def : Pat<(store (i1 -1), ADDRriS11_2:$a
 
 // Map from memb(Rs) = Pd -> Rt = mux(Pd, #0, #1); store Rt.
 def : Pat<(store (i1 PredRegs:$src1), ADDRriS11_2:$addr),
-      (S2_storerb_io ADDRriS11_2:$addr, 0, (i32 (C2_muxii (i1 PredRegs:$src1), 1, 0)) )>;
+      (S2_storerb_io AddrFI:$addr, 0, (i32 (C2_muxii (i1 PredRegs:$src1), 1, 0)) )>;
 
 // Map Rdd = anyext(Rs) -> Rdd = A2_sxtw(Rs).
 // Hexagon_TODO: We can probably use combine but that will cost 2 instructions.