[PATCH] [AArch64] Select lower sub,abs pattern to sabd on AArch64

Karthik Bhat kv.bhat at samsung.com
Fri Dec 26 07:38:54 PST 2014


Hi t.p.northover, jmolloy,

Hi,
The below code -
  int c[4],b[4],a[4];
  void fn() {
    c[0] = abs(a[0]-b[0]);
    c[1] = abs(a[1]-b[1]);
    c[2] = abs(a[2]-b[2]);
    c[3] = abs(a[3]-b[3]);
  }
is compiled into -
  fn:                                     // @fn
  // BB#0:
	adrp	x8, a
	add	x8, x8, :lo12:a
	adrp	x9, b
	add	x9, x9, :lo12:b
	ldr	 q0, [x8]
	ldr	 q1, [x9]
	sub	v0.4s, v0.4s, v1.4s
	abs	v0.4s, v0.4s
	adrp	x8, c
	add	x8, x8, :lo12:c
	str	 q0, [x8]
	ret
The 	sequence-
  sub	v0.4s, v0.4s, v1.4s
  abs	v0.4s, v0.4s
can further be lowered to a single instruction on AArch64-
  sabd	v0.4s, v0.4s, v1.4s
This patch pattern matches the same in .td file to generate sabd instruction.
Please let me know if this is good to commit.

Thanks and Regards
Karthik Bhat

REPOSITORY
  rL LLVM

http://reviews.llvm.org/D6781

Files:
  lib/Target/AArch64/AArch64InstrInfo.td
  test/CodeGen/AArch64/arm64-sabd.ll

EMAIL PREFERENCES
  http://reviews.llvm.org/settings/panel/emailpreferences/
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