[PATCH 1/2] Triple: Add gcn triple
Tom Stellard
tom at stellard.net
Tue Dec 23 12:36:26 PST 2014
Hi,
Here are updated patches with the new amdgcn triple.
-Tom
On Fri, Dec 19, 2014 at 09:03:10PM +0000, Eric Christopher wrote:
> amdgcn maybe? Also, gcn is pretty bad. What's next? gcnn?
>
> -eric
>
> On Fri Dec 19 2014 at 8:37:00 AM Tom Stellard <tom at stellard.net> wrote:
>
> > On Fri, Dec 19, 2014 at 11:10:05AM -0500, Matt Arsenault wrote:
> > >
> > > On 12/19/2014 10:43 AM, Tom Stellard wrote:
> > > >On Thu, Dec 04, 2014 at 10:40:23AM -0500, Tom Stellard wrote:
> > > >>This will be used for AMD GPUs with the Graphics Core Next
> > architecture.
> > > >Ping.
> > >
> > > I thought you were going to change this to amdgpu?
> > >
> >
> > I think it will make it easier to separate the functionality if there are
> > different
> > triples for each architecture. I still plan to rename the directory to
> > AMDGPU.
> >
> > -Tom
> >
> >
> > > >>---
> > > >> include/llvm/ADT/Triple.h | 1 +
> > > >> lib/Support/Triple.cpp | 7 +++++++
> > > >> 2 files changed, 8 insertions(+)
> > > >>
> > > >>diff --git a/include/llvm/ADT/Triple.h b/include/llvm/ADT/Triple.h
> > > >>index 0932040..643f29e 100644
> > > >>--- a/include/llvm/ADT/Triple.h
> > > >>+++ b/include/llvm/ADT/Triple.h
> > > >>@@ -50,6 +50,7 @@ public:
> > > >> armeb, // ARM (big endian): armeb
> > > >> aarch64, // AArch64 (little endian): aarch64
> > > >> aarch64_be, // AArch64 (big endian): aarch64_be
> > > >>+ gcn, // GCN: AMD GCN GPUs
> > > This should probably be next to r600 in the enum order and in all the
> > cases
> > > >> hexagon, // Hexagon: hexagon
> > > >> mips, // MIPS: mips, mipsallegrex
> > > >> mipsel, // MIPSEL: mipsel, mipsallegrexel
> > > >>diff --git a/lib/Support/Triple.cpp b/lib/Support/Triple.cpp
> > > >>index 64cd6e7..6570fe6 100644
> > > >>--- a/lib/Support/Triple.cpp
> > > >>+++ b/lib/Support/Triple.cpp
> > > >>@@ -24,6 +24,7 @@ const char *Triple::getArchTypeName(ArchType Kind) {
> > > >> case arm: return "arm";
> > > >> case armeb: return "armeb";
> > > >> case hexagon: return "hexagon";
> > > >>+ case gcn: return "gcn";
> > > >> case mips: return "mips";
> > > >> case mipsel: return "mipsel";
> > > >> case mips64: return "mips64";
> > > >>@@ -82,6 +83,7 @@ const char *Triple::getArchTypePrefix(ArchType
> > Kind) {
> > > >> case hexagon: return "hexagon";
> > > >>+ case gcn:
> > > >> case r600: return "r600";
> > > >> case sparcv9:
> > > >>@@ -199,6 +201,7 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef
> > Name) {
> > > >> .Case("ppc", ppc)
> > > >> .Case("ppc64le", ppc64le)
> > > >> .Case("r600", r600)
> > > >>+ .Case("gcn", gcn)
> > > >> .Case("hexagon", hexagon)
> > > >> .Case("sparc", sparc)
> > > >> .Case("sparcv9", sparcv9)
> > > >>@@ -286,6 +289,7 @@ static Triple::ArchType parseArch(StringRef
> > ArchName) {
> > > >> .Cases("mips64", "mips64eb", Triple::mips64)
> > > >> .Case("mips64el", Triple::mips64el)
> > > >> .Case("r600", Triple::r600)
> > > >>+ .Case("gcn", Triple::gcn)
> > > >> .Case("hexagon", Triple::hexagon)
> > > >> .Case("s390x", Triple::systemz)
> > > >> .Case("sparc", Triple::sparc)
> > > >>@@ -864,6 +868,7 @@ static unsigned getArchPointerBitWidth(llvm::Triple::ArchType
> > Arch) {
> > > >> case llvm::Triple::aarch64:
> > > >> case llvm::Triple::aarch64_be:
> > > >>+ case llvm::Triple::gcn:
> > > >> case llvm::Triple::le64:
> > > >> case llvm::Triple::mips64:
> > > >> case llvm::Triple::mips64el:
> > > >>@@ -899,6 +904,7 @@ Triple Triple::get32BitArchVariant() const {
> > > >> case Triple::UnknownArch:
> > > >> case Triple::aarch64:
> > > >> case Triple::aarch64_be:
> > > >>+ case Triple::gcn:
> > > >> case Triple::msp430:
> > > >> case Triple::systemz:
> > > >> case Triple::ppc64le:
> > > >>@@ -962,6 +968,7 @@ Triple Triple::get64BitArchVariant() const {
> > > >> case Triple::aarch64_be:
> > > >> case Triple::le64:
> > > >> case Triple::amdil64:
> > > >>+ case Triple::gcn:
> > > >> case Triple::hsail64:
> > > >> case Triple::spir64:
> > > >> case Triple::mips64:
> > > >>--
> > > >>1.8.5.5
> > > >>
> > > >>_______________________________________________
> > > >>llvm-commits mailing list
> > > >>llvm-commits at cs.uiuc.edu
> > > >>http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> > > >_______________________________________________
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> > > >http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
> > >
> > _______________________________________________
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> >
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