[llvm] r224739 - Debug info: Teach SROA how to update debug info for fragmented variables.

Chandler Carruth chandlerc at gmail.com
Mon Dec 22 18:57:34 PST 2014


It looks like this causes codegen to crash. See the attached test case.

I found this by running 'ninja check-msan' but you should be able to
reproduce it by running:

%  ./bin/clang -cc1 -triple x86_64-unknown-linux-gnu -emit-obj -g
-dwarf-column-info -ffunction-sections -fdata-sections -D
GTEST_NO_LLVM_RAW_OSTREAM=1 -D GTEST_HAS_RTTI=0 -O2 -w -std=c++11
-fdeprecated-macro -fvisibility-inlines-hidden -mstackrealign
gtest-all-dbe70c.cpp

Going to revert, lemme know if this isn't enough for you to repro and fix.

On Mon, Dec 22, 2014 at 2:26 PM, Adrian Prantl <aprantl at apple.com> wrote:

> Author: adrian
> Date: Mon Dec 22 16:26:00 2014
> New Revision: 224739
>
> URL: http://llvm.org/viewvc/llvm-project?rev=224739&view=rev
> Log:
> Debug info: Teach SROA how to update debug info for fragmented variables.
> This allows us to generate debug info for extremely advanced code such as
>
>   typedef struct { long int a; int b;} S;
>
>   int foo(S s) {
>     return s.b;
>   }
>
> which at -O1 on x86_64 is codegen'd into
>
>   define i32 @foo(i64 %s.coerce0, i32 %s.coerce1) #0 {
>     ret i32 %s.coerce1, !dbg !24
>   }
>
> with this patch we emit the following debug info for this
>
>   TAG_formal_parameter [3]
>     AT_location( 0x00000000
>                  0x0000000000000000 - 0x0000000000000006: rdi, piece
> 0x00000008, rsi, piece 0x00000004
>                  0x0000000000000006 - 0x0000000000000008: rdi, piece
> 0x00000008, rax, piece 0x00000004 )
>                  AT_name( "s" )
>                  AT_decl_file(
> "/Volumes/Data/llvm/_build.ninja.release/test.c" )
>
> Thanks to chandlerc, dblaikie, and echristo for their feedback on all
> previous iterations of this patch!
>
> Added:
>     llvm/trunk/test/DebugInfo/X86/sroasplit-1.ll
>     llvm/trunk/test/DebugInfo/X86/sroasplit-2.ll
> Modified:
>     llvm/trunk/lib/Transforms/Scalar/SROA.cpp
>     llvm/trunk/test/DebugInfo/X86/array2.ll
>
> Modified: llvm/trunk/lib/Transforms/Scalar/SROA.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SROA.cpp?rev=224739&r1=224738&r2=224739&view=diff
>
> ==============================================================================
> --- llvm/trunk/lib/Transforms/Scalar/SROA.cpp (original)
> +++ llvm/trunk/lib/Transforms/Scalar/SROA.cpp Mon Dec 22 16:26:00 2014
> @@ -953,6 +953,10 @@ class SROA : public FunctionPass {
>    /// currently in the promotable queue.
>    SetVector<SelectInst *, SmallVector<SelectInst *, 2>>
> SpeculatableSelects;
>
> +  /// Debug intrinsics do not show up as regular uses in the
> +  /// IR. This side-table holds the missing use edges.
> +  DenseMap<AllocaInst *, DbgDeclareInst *> DbgDeclares;
> +
>  public:
>    SROA(bool RequiresDomTree = true)
>        : FunctionPass(ID), RequiresDomTree(RequiresDomTree), C(nullptr),
> @@ -3230,6 +3234,27 @@ bool SROA::rewritePartition(AllocaInst &
>          new AllocaInst(SliceTy, nullptr, Alignment,
>                         AI.getName() + ".sroa." + Twine(B - AS.begin()),
> &AI);
>      ++NumNewAllocas;
> +
> +    // Migrate debug information from the old alloca to the new alloca
> +    // and the individial slices.
> +    if (DbgDeclareInst *DbgDecl = DbgDeclares.lookup(&AI)) {
> +      DIVariable Var(DbgDecl->getVariable());
> +      DIExpression Piece;
> +      DIBuilder DIB(*AI.getParent()->getParent()->getParent(),
> +                    /*AllowUnresolved*/ false);
> +      // Create a piece expression describing the slice, if the new slize
> is
> +      // smaller than the old alloca or the old alloca already was
> described
> +      // with a piece. It would be even better to just compare against
> the size
> +      // of the type described in the debug info, but then we would need
> to
> +      // build an expensive DIRefMap.
> +      if (SliceSize < DL->getTypeAllocSize(AI.getAllocatedType()) ||
> +          DIExpression(DbgDecl->getExpression()).isVariablePiece())
> +        Piece = DIB.createPieceExpression(BeginOffset, SliceSize);
> +      Instruction *NewDDI = DIB.insertDeclare(NewAI, Var, Piece, &AI);
> +      NewDDI->setDebugLoc(DbgDecl->getDebugLoc());
> +      DbgDeclares.insert(std::make_pair(NewAI,
> cast<DbgDeclareInst>(NewDDI)));
> +      DeadInsts.insert(DbgDecl);
> +    }
>    }
>
>    DEBUG(dbgs() << "Rewriting alloca partition "
> @@ -3680,9 +3705,13 @@ bool SROA::runOnFunction(Function &F) {
>
>    BasicBlock &EntryBB = F.getEntryBlock();
>    for (BasicBlock::iterator I = EntryBB.begin(), E =
> std::prev(EntryBB.end());
> -       I != E; ++I)
> +       I != E; ++I) {
>      if (AllocaInst *AI = dyn_cast<AllocaInst>(I))
>        Worklist.insert(AI);
> +    else if (DbgDeclareInst *DDI = dyn_cast<DbgDeclareInst>(I))
> +      if (auto AI = dyn_cast_or_null<AllocaInst>(DDI->getAddress()))
> +        DbgDeclares.insert(std::make_pair(AI, DDI));
> +  }
>
>    bool Changed = false;
>    // A set of deleted alloca instruction pointers which should be removed
> from
>
> Modified: llvm/trunk/test/DebugInfo/X86/array2.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/array2.ll?rev=224739&r1=224738&r2=224739&view=diff
>
> ==============================================================================
> --- llvm/trunk/test/DebugInfo/X86/array2.ll (original)
> +++ llvm/trunk/test/DebugInfo/X86/array2.ll Mon Dec 22 16:26:00 2014
> @@ -13,12 +13,12 @@
>  ; }
>  ;
>  ; RUN: opt %s -O2 -S -o - | FileCheck %s
> -; Test that we do not lower dbg.declares for arrays.
> +; Test that we correctly lower dbg.declares for arrays.
>  ;
>  ; CHECK: define i32 @main
> -; CHECK: call void @llvm.dbg.value
> -; CHECK: call void @llvm.dbg.value
> -; CHECK: call void @llvm.dbg.declare
> +; CHECK: call void @llvm.dbg.value(metadata i32 42, i64 0, metadata
> ![[ARRAY:[0-9]+]], metadata ![[EXPR:[0-9]+]])
> +; CHECK: ![[ARRAY]] = {{.*}}; [ DW_TAG_auto_variable ] [array] [line 6]
> +; CHECK: ![[EXPR]] = {{.*}}; [ DW_TAG_expression ] [DW_OP_piece offset=0,
> size=4]
>  target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
>  target triple = "x86_64-apple-macosx10.9.0"
>
>
> Added: llvm/trunk/test/DebugInfo/X86/sroasplit-1.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/sroasplit-1.ll?rev=224739&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/DebugInfo/X86/sroasplit-1.ll (added)
> +++ llvm/trunk/test/DebugInfo/X86/sroasplit-1.ll Mon Dec 22 16:26:00 2014
> @@ -0,0 +1,97 @@
> +; RUN: opt %s -sroa -verify -S -o - | FileCheck %s
> +;
> +; Test that we can partial emit debug info for aggregates repeatedly
> +; split up by SROA.
> +;
> +;    // Compile with -O1
> +;    typedef struct {
> +;      int a;
> +;      long int b;
> +;    } Inner;
> +;
> +;    typedef struct {
> +;      Inner inner[2];
> +;    } Outer;
> +;
> +;    int foo(Outer outer) {
> +;      Inner i1 = outer.inner[1];
> +;      return i1.a;
> +;    }
> +;
> +
> +; Verify that SROA creates a variable piece when splitting i1.
> +; CHECK: %[[I1:.*]] = alloca [12 x i8], align 4
> +; CHECK: call void @llvm.dbg.declare(metadata [12 x i8]* %[[I1]],
> metadata ![[VAR:[0-9]+]], metadata ![[PIECE1:[0-9]+]])
> +; CHECK: call void @llvm.dbg.value(metadata i32 %[[A:.*]], i64 0,
> metadata ![[VAR]], metadata ![[PIECE2:[0-9]+]])
> +; CHECK: ret i32 %[[A]]
> +; Read Var and Piece:
> +; CHECK: ![[VAR]] = {{.*}} ; [ DW_TAG_auto_variable ] [i1] [line 11]
> +; CHECK: ![[PIECE1]] = {{.*}} ; [ DW_TAG_expression ] [DW_OP_piece
> offset=4, size=12]
> +; CHECK: ![[PIECE2]] = {{.*}} ; [ DW_TAG_expression ] [DW_OP_piece
> offset=0, size=4]
> +
> +target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
> +target triple = "x86_64-apple-macosx10.9.0"
> +
> +%struct.Outer = type { [2 x %struct.Inner] }
> +%struct.Inner = type { i32, i64 }
> +
> +; Function Attrs: nounwind ssp uwtable
> +define i32 @foo(%struct.Outer* byval align 8 %outer) #0 {
> +entry:
> +  %i1 = alloca %struct.Inner, align 8
> +  call void @llvm.dbg.declare(metadata %struct.Outer* %outer, metadata
> !25, metadata !2), !dbg !26
> +  call void @llvm.dbg.declare(metadata %struct.Inner* %i1, metadata !27,
> metadata !2), !dbg !28
> +  %inner = getelementptr inbounds %struct.Outer* %outer, i32 0, i32 0,
> !dbg !28
> +  %arrayidx = getelementptr inbounds [2 x %struct.Inner]* %inner, i32 0,
> i64 1, !dbg !28
> +  %0 = bitcast %struct.Inner* %i1 to i8*, !dbg !28
> +  %1 = bitcast %struct.Inner* %arrayidx to i8*, !dbg !28
> +  call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* %1, i64 16, i32 8, i1
> false), !dbg !28
> +  %a = getelementptr inbounds %struct.Inner* %i1, i32 0, i32 0, !dbg !29
> +  %2 = load i32* %a, align 4, !dbg !29
> +  ret i32 %2, !dbg !29
> +}
> +
> +; Function Attrs: nounwind readnone
> +declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
> +
> +; Function Attrs: nounwind
> +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture
> readonly, i64, i32, i1) #2
> +
> +attributes #0 = { nounwind ssp uwtable }
> +attributes #1 = { nounwind readnone }
> +attributes #2 = { nounwind }
> +
> +!llvm.dbg.cu = !{!0}
> +!llvm.module.flags = !{!22, !23}
> +!llvm.ident = !{!24}
> +
> +!0 = !{!"0x11\0012\00clang version 3.5.0 \000\00\000\00\001", !1, !2, !2,
> !3, !2, !2} ; [ DW_TAG_compile_unit ] [ DW_TAG_compile_unit ]
> [sroasplit-1.c] [DW_LANG_C99]
> +!1 = !{!"sroasplit-1.c", !""}
> +!2 = !{}
> +!3 = !{!4}
> +!4 = !{!"0x2e\00foo\00foo\00\0010\000\001\000\006\00256\000\0010", !1,
> !5, !6, null, i32 (%struct.Outer*)* @foo, null, null, !2} ; [
> DW_TAG_subprogram ] [ DW_TAG_subprogram ] [line 10] [def] [foo]
> +!5 = !{!"0x29", !1} ; [ DW_TAG_file_type ] [ DW_TAG_file_type ]
> [sroasplit-1.c]
> +!6 = !{!"0x15\00\000\000\000\000\000\000", i32 0, null, null, !7, null,
> null, null} ; [ DW_TAG_subroutine_type ] [ DW_TAG_subroutine_type ] [line
> 0, size 0, align 0, offset 0] [from ]
> +!7 = !{!8, !9}
> +!8 = !{!"0x24\00int\000\0032\0032\000\000\005", null, null} ; [
> DW_TAG_base_type ] [ DW_TAG_base_type ] [int] [line 0, size 32, align 32,
> offset 0, enc DW_ATE_signed]
> +!9 = !{!"0x16\00Outer\008\000\000\000\000", !1, null, !10} ; [
> DW_TAG_typedef ] [ DW_TAG_typedef ] [Outer] [line 8, size 0, align 0,
> offset 0] [from ]
> +!10 = !{!"0x13\00\006\00256\0064\000\000\000", !1, null, null, !11, null,
> null, null} ; [ DW_TAG_structure_type ] [line 6, size 256, align 64, offset
> 0] [def] [from ]
> +!11 = !{!12}
> +!12 = !{!"0xd\00inner\007\00256\0064\000\000", !1, !10, !13} ; [
> DW_TAG_member ] [inner] [line 7, size 256, align 64, offset 0] [from ]
> +!13 = !{!"0x1\00\000\00256\0064\000\000", null, null, !14, !20, i32 0,
> null, null, null} ; [ DW_TAG_array_type ] [line 0, size 256, align 64,
> offset 0] [from Inner]
> +!14 = !{!"0x16\00Inner\004\000\000\000\000", !1, null, !15} ; [
> DW_TAG_typedef ] [ DW_TAG_typedef ] [Inner] [line 4, size 0, align 0,
> offset 0] [from ]
> +!15 = !{!"0x13\00\001\00128\0064\000\000\000", !1, null, null, !16, null,
> null, null} ; [ DW_TAG_structure_type ] [line 1, size 128, align 64, offset
> 0] [def] [from ]
> +!16 = !{!17, !18}
> +!17 = !{!"0xd\00a\002\0032\0032\000\000", !1, !15, !8} ; [ DW_TAG_member
> ] [a] [line 2, size 32, align 32, offset 0] [from int]
> +!18 = !{!"0xd\00b\003\0064\0064\0064\000", !1, !15, !19} ; [
> DW_TAG_member ] [b] [line 3, size 64, align 64, offset 64] [from long int]
> +!19 = !{!"0x24\00long int\000\0064\0064\000\000\005", null, null} ; [
> DW_TAG_base_type ] [ DW_TAG_base_type ] [long int] [line 0, size 64, align
> 64, offset 0, enc DW_ATE_signed]
> +!20 = !{!21}
> +!21 = !{!"0x21\000\002"}        ; [ DW_TAG_subrange_type ] [0, 1]
> +!22 = !{i32 2, !"Dwarf Version", i32 2}
> +!23 = !{i32 1, !"Debug Info Version", i32 2}
> +!24 = !{!"clang version 3.5.0 "}
> +!25 = !{!"0x101\00outer\0016777226\000", !4, !5, !9} ; [
> DW_TAG_arg_variable ] [ DW_TAG_arg_variable ] [outer] [line 10]
> +!26 = !{i32 10, i32 0, !4, null}
> +!27 = !{!"0x100\00i1\0011\000", !4, !5, !14} ; [ DW_TAG_auto_variable ] [
> DW_TAG_auto_variable ] [i1] [line 11]
> +!28 = !{i32 11, i32 0, !4, null}
> +!29 = !{i32 12, i32 0, !4, null}
>
> Added: llvm/trunk/test/DebugInfo/X86/sroasplit-2.ll
> URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/test/DebugInfo/X86/sroasplit-2.ll?rev=224739&view=auto
>
> ==============================================================================
> --- llvm/trunk/test/DebugInfo/X86/sroasplit-2.ll (added)
> +++ llvm/trunk/test/DebugInfo/X86/sroasplit-2.ll Mon Dec 22 16:26:00 2014
> @@ -0,0 +1,102 @@
> +; RUN: opt %s -sroa -verify -S -o - | FileCheck %s
> +;
> +; Test that we can partial emit debug info for aggregates repeatedly
> +; split up by SROA.
> +;
> +;    // Compile with -O1
> +;    typedef struct {
> +;      int a;
> +;      int b;
> +;    } Inner;
> +;
> +;    typedef struct {
> +;      Inner inner[2];
> +;    } Outer;
> +;
> +;    int foo(Outer outer) {
> +;      Inner i1 = outer.inner[1];
> +;      return i1.a;
> +;    }
> +;
> +
> +; Verify that SROA creates a variable piece when splitting i1.
> +; CHECK:  call void @llvm.dbg.value(metadata i64 %outer.coerce0, i64 0,
> metadata ![[O:[0-9]+]], metadata ![[PIECE1:[0-9]+]]),
> +; CHECK:  call void @llvm.dbg.value(metadata i64 %outer.coerce1, i64 0,
> metadata ![[O]], metadata ![[PIECE2:[0-9]+]]),
> +; CHECK:  call void @llvm.dbg.value({{.*}}, i64 0, metadata
> ![[I1:[0-9]+]], metadata ![[PIECE3:[0-9]+]]),
> +; CHECK-DAG: ![[O]] = {{.*}} [ DW_TAG_arg_variable ] [outer] [line 10]
> +; CHECK-DAG: ![[PIECE1]] = {{.*}} [ DW_TAG_expression ] [DW_OP_piece
> offset=0, size=8]
> +; CHECK-DAG: ![[PIECE2]] = {{.*}} [ DW_TAG_expression ] [DW_OP_piece
> offset=8, size=8]
> +; CHECK-DAG: ![[I1]] = {{.*}} [ DW_TAG_auto_variable ] [i1] [line 11]
> +; CHECK-DAG: ![[PIECE3]] = {{.*}} [ DW_TAG_expression ] [DW_OP_piece
> offset=0, size=4]
> +
> +; ModuleID = 'sroasplit-2.c'
> +target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
> +target triple = "x86_64-apple-macosx10.9.0"
> +
> +%struct.Outer = type { [2 x %struct.Inner] }
> +%struct.Inner = type { i32, i32 }
> +
> +; Function Attrs: nounwind ssp uwtable
> +define i32 @foo(i64 %outer.coerce0, i64 %outer.coerce1) #0 {
> +  %outer = alloca %struct.Outer, align 8
> +  %i1 = alloca %struct.Inner, align 4
> +  %1 = bitcast %struct.Outer* %outer to { i64, i64 }*
> +  %2 = getelementptr { i64, i64 }* %1, i32 0, i32 0
> +  store i64 %outer.coerce0, i64* %2
> +  %3 = getelementptr { i64, i64 }* %1, i32 0, i32 1
> +  store i64 %outer.coerce1, i64* %3
> +  call void @llvm.dbg.declare(metadata %struct.Outer* %outer, metadata
> !24, metadata !2), !dbg !25
> +  call void @llvm.dbg.declare(metadata %struct.Inner* %i1, metadata !26,
> metadata !2), !dbg !27
> +  %4 = getelementptr inbounds %struct.Outer* %outer, i32 0, i32 0, !dbg
> !27
> +  %5 = getelementptr inbounds [2 x %struct.Inner]* %4, i32 0, i64 1, !dbg
> !27
> +  %6 = bitcast %struct.Inner* %i1 to i8*, !dbg !27
> +  %7 = bitcast %struct.Inner* %5 to i8*, !dbg !27
> +  call void @llvm.memcpy.p0i8.p0i8.i64(i8* %6, i8* %7, i64 8, i32 4, i1
> false), !dbg !27
> +  %8 = getelementptr inbounds %struct.Inner* %i1, i32 0, i32 0, !dbg !28
> +  %9 = load i32* %8, align 4, !dbg !28
> +  ret i32 %9, !dbg !28
> +}
> +
> +; Function Attrs: nounwind readnone
> +declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
> +
> +; Function Attrs: nounwind
> +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture
> readonly, i64, i32, i1) #2
> +
> +attributes #0 = { nounwind ssp uwtable "no-frame-pointer-elim"="true" }
> +attributes #1 = { nounwind readnone }
> +attributes #2 = { nounwind }
> +
> +!llvm.dbg.cu = !{!0}
> +!llvm.module.flags = !{!21, !22}
> +!llvm.ident = !{!23}
> +
> +!0 = !{!"0x11\0012\00clang version 3.5.0 \000\00\000\00\001", !1, !2, !2,
> !3, !2, !2} ; [ DW_TAG_compile_unit ] [ DW_TAG_compile_unit ]
> [sroasplit-2.c] [DW_LANG_C99]
> +!1 = !{!"sroasplit-2.c", !""}
> +!2 = !{}
> +!3 = !{!4}
> +!4 = !{!"0x2e\00foo\00foo\00\0010\000\001\000\006\00256\000\0010", !1,
> !5, !6, null, i32 (i64, i64)* @foo, null, null, !2} ; [ DW_TAG_subprogram ]
> [ DW_TAG_subprogram ] [line 10] [def] [foo]
> +!5 = !{!"0x29", !1} ; [ DW_TAG_file_type ] [ DW_TAG_file_type ]
> [sroasplit-2.c]
> +!6 = !{!"0x15\00\000\000\000\000\000\000", i32 0, null, null, !7, null,
> null, null} ; [ DW_TAG_subroutine_type ] [ DW_TAG_subroutine_type ] [line
> 0, size 0, align 0, offset 0] [from ]
> +!7 = !{!8, !9}
> +!8 = !{!"0x24\00int\000\0032\0032\000\000\005", null, null} ; [
> DW_TAG_base_type ] [ DW_TAG_base_type ] [int] [line 0, size 32, align 32,
> offset 0, enc DW_ATE_signed]
> +!9 = !{!"0x16\00Outer\008\000\000\000\000", !1, null, !10} ; [
> DW_TAG_typedef ] [ DW_TAG_typedef ] [Outer] [line 8, size 0, align 0,
> offset 0] [from ]
> +!10 = !{!"0x13\00\006\00128\0032\000\000\000", !1, null, null, !11, null,
> null, null} ; [ DW_TAG_structure_type ] [line 6, size 128, align 32, offset
> 0] [def] [from ]
> +!11 = !{!12}
> +!12 = !{!"0xd\00inner\007\00128\0032\000\000", !1, !10, !13} ; [
> DW_TAG_member ] [inner] [line 7, size 128, align 32, offset 0] [from ]
> +!13 = !{!"0x1\00\000\00128\0032\000\000", null, null, !14, !19, i32 0,
> null, null, null} ; [ DW_TAG_array_type ] [line 0, size 128, align 32,
> offset 0] [from Inner]
> +!14 = !{!"0x16\00Inner\004\000\000\000\000", !1, null, !15} ; [
> DW_TAG_typedef ] [ DW_TAG_typedef ] [Inner] [line 4, size 0, align 0,
> offset 0] [from ]
> +!15 = !{!"0x13\00\001\0064\0032\000\000\000", !1, null, null, !16, null,
> null, null} ; [ DW_TAG_structure_type ] [line 1, size 64, align 32, offset
> 0] [def] [from ]
> +!16 = !{!17, !18}
> +!17 = !{!"0xd\00a\002\0032\0032\000\000", !1, !15, !8} ; [ DW_TAG_member
> ] [a] [line 2, size 32, align 32, offset 0] [from int]
> +!18 = !{!"0xd\00b\003\0032\0032\0032\000", !1, !15, !8} ; [ DW_TAG_member
> ] [b] [line 3, size 32, align 32, offset 32] [from int]
> +!19 = !{!20}
> +!20 = !{!"0x21\000\002"}        ; [ DW_TAG_subrange_type ] [0, 1]
> +!21 = !{i32 2, !"Dwarf Version", i32 2}
> +!22 = !{i32 1, !"Debug Info Version", i32 2}
> +!23 = !{!"clang version 3.5.0 "}
> +!24 = !{!"0x101\00outer\0016777226\000", !4, !5, !9} ; [
> DW_TAG_arg_variable ] [ DW_TAG_arg_variable ] [outer] [line 10]
> +!25 = !{i32 10, i32 0, !4, null}
> +!26 = !{!"0x100\00i1\0011\000", !4, !5, !14} ; [ DW_TAG_auto_variable ] [
> DW_TAG_auto_variable ] [i1] [line 11]
> +!27 = !{i32 11, i32 0, !4, null}
> +!28 = !{i32 12, i32 0, !4, null}
>
>
> _______________________________________________
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> llvm-commits at cs.uiuc.edu
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>
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