[PATCH] x86 NaCl: Emit LAHF/SAHF instead of PUSHF/POPF
JF Bastien
jfb at chromium.org
Fri Dec 19 15:22:05 PST 2014
At this point I think the issue is in how liveness is tagged onto `CMOV`, but I'm not sure I understand how that happens from the tablegen files. Post-RA pseudo instruction expansion pass transforms the following:
CALL64pcrel32 <ga:@foo>, <regmask>, %RSP<imp-use>, %RSP<imp-def>, %EAX<imp-def>
%EFLAGS<def> = COPY %R14<kill>
%EAX<def,tied1> = CMOVE32rr %EAX<kill,tied0>, %EBX<kill>, %EFLAGS<imp-use>
%RSP<def,tied1> = ADD64ri8 %RSP<tied0>, 8, %EFLAGS<imp-def,dead>
%RBX<def> = POP64r %RSP<imp-def>, %RSP<imp-use>
%R14<def> = POP64r %RSP<imp-def>, %RSP<imp-use>
RETQ %EAX
Into:
CALL64pcrel32 <ga:@foo>, <regmask>, %RSP<imp-use>, %RSP<imp-def>, %EAX<imp-def>
%RAX<def> = MOV64rr %R14<kill>
%AL<def,tied1> = ADD8ri %AL<tied0>, 127, %EFLAGS<imp-def>
SAHF %EFLAGS<imp-def>, %AH<imp-use>
%EAX<def,tied1> = CMOVE32rr %EAX<kill,tied0>, %EBX<kill>, %EFLAGS<imp-use>
%RSP<def,tied1> = ADD64ri8 %RSP<tied0>, 8, %EFLAGS<imp-def,dead>
%RBX<def> = POP64r %RSP<imp-def>, %RSP<imp-use>
%R14<def> = POP64r %RSP<imp-def>, %RSP<imp-use>
RETQ %EAX
Note the lack of AX save/restore because liveness thinks it ins't live at this location.
@t.p.northover do you think that's indeed where the bug lies, or am I missing something?
http://reviews.llvm.org/D6629
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