[llvm] r224313 - LiveRangeCalc: Rewrite subrange calculation
Quentin Colombet
qcolombet at apple.com
Thu Dec 18 14:53:11 PST 2014
Hi Matthias,
Nice clean-up!
Thanks,
-Quentin
On Dec 15, 2014, at 8:03 PM, Matthias Braun <matze at braunis.de> wrote:
> Author: matze
> Date: Mon Dec 15 22:03:38 2014
> New Revision: 224313
>
> URL: http://llvm.org/viewvc/llvm-project?rev=224313&view=rev
> Log:
> LiveRangeCalc: Rewrite subrange calculation
>
> This changes subrange calculation to calculate subranges sequentially
> instead of in parallel. The code is easier to understand that way and
> addresses the code review issues raised about LiveOutData being
> hard to understand/needing more comments by removing them :)
>
> Modified:
> llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
> llvm/trunk/lib/CodeGen/LiveRangeCalc.cpp
> llvm/trunk/lib/CodeGen/LiveRangeCalc.h
>
> Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=224313&r1=224312&r2=224313&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
> +++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Dec 15 22:03:38 2014
> @@ -192,8 +192,7 @@ void LiveIntervals::computeVirtRegInterv
> assert(LRCalc && "LRCalc not initialized.");
> assert(LI.empty() && "Should only compute empty intervals.");
> LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator());
> - LRCalc->createDeadDefs(LI);
> - LRCalc->extendToUses(LI);
> + LRCalc->calculate(LI);
> computeDeadValues(LI, LI);
> }
>
>
> Modified: llvm/trunk/lib/CodeGen/LiveRangeCalc.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveRangeCalc.cpp?rev=224313&r1=224312&r2=224313&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/LiveRangeCalc.cpp (original)
> +++ llvm/trunk/lib/CodeGen/LiveRangeCalc.cpp Mon Dec 15 22:03:38 2014
> @@ -19,6 +19,13 @@ using namespace llvm;
>
> #define DEBUG_TYPE "regalloc"
>
> +void LiveRangeCalc::resetLiveOutMap() {
> + unsigned NumBlocks = MF->getNumBlockIDs();
> + Seen.clear();
> + Seen.resize(NumBlocks);
> + Map.resize(NumBlocks);
> +}
> +
> void LiveRangeCalc::reset(const MachineFunction *mf,
> SlotIndexes *SI,
> MachineDominatorTree *MDT,
> @@ -28,32 +35,36 @@ void LiveRangeCalc::reset(const MachineF
> Indexes = SI;
> DomTree = MDT;
> Alloc = VNIA;
> -
> - MainLiveOutData.reset(MF->getNumBlockIDs());
> + resetLiveOutMap();
> LiveIn.clear();
> }
>
>
> -static SlotIndex getDefIndex(const SlotIndexes &Indexes, const MachineInstr &MI,
> - bool EarlyClobber) {
> - // PHI defs begin at the basic block start index.
> - if (MI.isPHI())
> - return Indexes.getMBBStartIdx(MI.getParent());
> +static void createDeadDef(SlotIndexes &Indexes, VNInfo::Allocator &Alloc,
> + LiveRange &LR, const MachineOperand &MO) {
> + const MachineInstr *MI = MO.getParent();
> + SlotIndex DefIdx;
> + if (MI->isPHI())
> + DefIdx = Indexes.getMBBStartIdx(MI->getParent());
> + else
> + DefIdx = Indexes.getInstructionIndex(MI).getRegSlot(MO.isEarlyClobber());
>
> - // Instructions are either normal 'r', or early clobber 'e'.
> - return Indexes.getInstructionIndex(&MI).getRegSlot(EarlyClobber);
> + // Create the def in LR. This may find an existing def.
> + LR.createDeadDef(DefIdx, Alloc);
> }
>
> -void LiveRangeCalc::createDeadDefs(LiveInterval &LI) {
> +void LiveRangeCalc::calculate(LiveInterval &LI) {
> assert(MRI && Indexes && "call reset() first");
>
> + // Step 1: Create minimal live segments for every definition of Reg.
> // Visit all def operands. If the same instruction has multiple defs of Reg,
> - // LR.createDeadDef() will deduplicate.
> + // createDeadDef() will deduplicate.
> const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();
> unsigned Reg = LI.reg;
> - for (const MachineOperand &MO : MRI->def_operands(Reg)) {
> - const MachineInstr *MI = MO.getParent();
> - SlotIndex Idx = getDefIndex(*Indexes, *MI, MO.isEarlyClobber());
> + for (const MachineOperand &MO : MRI->reg_nodbg_operands(Reg)) {
> + if (!MO.isDef() && !MO.readsReg())
> + continue;
> +
> unsigned SubReg = MO.getSubReg();
> if (LI.hasSubRanges() || (SubReg != 0 && MRI->tracksSubRegLiveness())) {
> unsigned Mask = SubReg != 0 ? TRI.getSubRegIndexLaneMask(SubReg)
> @@ -82,155 +93,105 @@ void LiveRangeCalc::createDeadDefs(LiveI
> assert(Common == S.LaneMask);
> CommonRange = &S;
> }
> - CommonRange->createDeadDef(Idx, *Alloc);
> + if (MO.isDef())
> + createDeadDef(*Indexes, *Alloc, *CommonRange, MO);
> Mask &= ~Common;
> }
> + // Create a new SubRange for subregs we did not cover yet.
> if (Mask != 0) {
> - LiveInterval::SubRange *SubRange = LI.createSubRange(*Alloc, Mask);
> - SubRange->createDeadDef(Idx, *Alloc);
> + LiveInterval::SubRange *NewRange = LI.createSubRange(*Alloc, Mask);
> + if (MO.isDef())
> + createDeadDef(*Indexes, *Alloc, *NewRange, MO);
> }
> }
>
> - // Create the def in LR. This may find an existing def.
> - LI.createDeadDef(Idx, *Alloc);
> - }
> -}
> -
> -
> -void LiveRangeCalc::createDeadDefs(LiveRange &LR, unsigned Reg) {
> - assert(MRI && Indexes && "call reset() first");
> -
> - // Visit all def operands. If the same instruction has multiple defs of Reg,
> - // LR.createDeadDef() will deduplicate.
> - for (MachineOperand &MO : MRI->def_operands(Reg)) {
> - const MachineInstr *MI = MO.getParent();
> - SlotIndex Idx = getDefIndex(*Indexes, *MI, MO.isEarlyClobber());
> - // Create the def in LR. This may find an existing def.
> - LR.createDeadDef(Idx, *Alloc);
> + // Create the def in the main liverange.
> + if (MO.isDef())
> + createDeadDef(*Indexes, *Alloc, LI, MO);
> }
> -}
>
> + // We may have created empty live ranges for partially undefined uses, we
> + // can't keep them because we won't find defs in them later.
> + LI.removeEmptySubRanges();
>
> -static SlotIndex getUseIndex(const SlotIndexes &Indexes,
> - const MachineOperand &MO) {
> - const MachineInstr *MI = MO.getParent();
> - unsigned OpNo = (&MO - &MI->getOperand(0));
> - if (MI->isPHI()) {
> - assert(!MO.isDef() && "Cannot handle PHI def of partial register.");
> - // The actual place where a phi operand is used is the end of the pred MBB.
> - // PHI operands are paired: (Reg, PredMBB).
> - return Indexes.getMBBEndIdx(MI->getOperand(OpNo+1).getMBB());
> + // Step 2: Extend live segments to all uses, constructing SSA form as
> + // necessary.
> + for (LiveInterval::SubRange &S : LI.subranges()) {
> + resetLiveOutMap();
> + extendToUses(S, Reg, S.LaneMask);
> }
>
> - // Check for early-clobber redefs.
> - bool isEarlyClobber = false;
> - unsigned DefIdx;
> - if (MO.isDef()) {
> - isEarlyClobber = MO.isEarlyClobber();
> - } else if (MI->isRegTiedToDefOperand(OpNo, &DefIdx)) {
> - // FIXME: This would be a lot easier if tied early-clobber uses also
> - // had an early-clobber flag.
> - isEarlyClobber = MI->getOperand(DefIdx).isEarlyClobber();
> - }
> - return Indexes.getInstructionIndex(MI).getRegSlot(isEarlyClobber);
> + resetLiveOutMap();
> + extendToUses(LI, Reg, ~0u);
> }
>
>
> -void LiveRangeCalc::extendToUses(LiveRange &LR, unsigned Reg) {
> +void LiveRangeCalc::createDeadDefs(LiveRange &LR, unsigned Reg) {
> assert(MRI && Indexes && "call reset() first");
>
> - // Visit all operands that read Reg. This may include partial defs.
> - for (MachineOperand &MO : MRI->reg_nodbg_operands(Reg)) {
> - // Clear all kill flags. They will be reinserted after register allocation
> - // by LiveIntervalAnalysis::addKillFlags().
> - if (MO.isUse())
> - MO.setIsKill(false);
> - if (!MO.readsReg())
> - continue;
> - // MI is reading Reg. We may have visited MI before if it happens to be
> - // reading Reg multiple times. That is OK, extend() is idempotent.
> - SlotIndex Idx = getUseIndex(*Indexes, MO);
> - extend(LR, Idx, Reg, MainLiveOutData);
> - }
> + // Visit all def operands. If the same instruction has multiple defs of Reg,
> + // LR.createDeadDef() will deduplicate.
> + for (MachineOperand &MO : MRI->def_operands(Reg))
> + createDeadDef(*Indexes, *Alloc, LR, MO);
> }
>
>
> -void LiveRangeCalc::extendToUses(LiveInterval &LI) {
> - assert(MRI && Indexes && "call reset() first");
> -
> - const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();
> - SmallVector<LiveOutData,2> LiveOuts;
> - unsigned NumSubRanges = 0;
> - for (const auto &S : LI.subranges()) {
> - (void)S;
> - ++NumSubRanges;
> - LiveOuts.push_back(LiveOutData());
> - LiveOuts.back().reset(MF->getNumBlockIDs());
> - }
> -
> +void LiveRangeCalc::extendToUses(LiveRange &LR, unsigned Reg, unsigned Mask) {
> // Visit all operands that read Reg. This may include partial defs.
> - unsigned Reg = LI.reg;
> + const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();
> for (MachineOperand &MO : MRI->reg_nodbg_operands(Reg)) {
> // Clear all kill flags. They will be reinserted after register allocation
> // by LiveIntervalAnalysis::addKillFlags().
> if (MO.isUse())
> MO.setIsKill(false);
> + else {
> + // We only care about uses, but on the main range (mask ~0u) this includes
> + // the "virtual" reads happening for subregister defs.
> + if (Mask != ~0u)
> + continue;
> + }
> +
> if (!MO.readsReg())
> continue;
> - SlotIndex Idx = getUseIndex(*Indexes, MO);
> unsigned SubReg = MO.getSubReg();
> - if (MO.isUse() && (LI.hasSubRanges() ||
> - (MRI->tracksSubRegLiveness() && SubReg != 0))) {
> - unsigned Mask = SubReg != 0
> - ? TRI.getSubRegIndexLaneMask(SubReg)
> - : MRI->getMaxLaneMaskForVReg(Reg);
> + if (SubReg != 0) {
> + unsigned SubRegMask = TRI.getSubRegIndexLaneMask(SubReg);
> + // Ignore uses not covering the current subrange.
> + if ((SubRegMask & Mask) == 0)
> + continue;
> + }
>
> - // If this is the first time we see a subregister def/use. Initialize
> - // subranges by creating a copy of the main range.
> - if (!LI.hasSubRanges()) {
> - unsigned ClassMask = MRI->getMaxLaneMaskForVReg(Reg);
> - LI.createSubRangeFrom(*Alloc, ClassMask, LI);
> - LiveOuts.insert(LiveOuts.begin(), LiveOutData());
> - LiveOuts.front().reset(MF->getNumBlockIDs());
> - ++NumSubRanges;
> - }
> - unsigned SubRangeIdx = 0;
> - for (LiveInterval::subrange_iterator S = LI.subrange_begin(),
> - SE = LI.subrange_end(); S != SE; ++S, ++SubRangeIdx) {
> - // A Mask for subregs common to the existing subrange and current def.
> - unsigned Common = S->LaneMask & Mask;
> - if (Common == 0)
> - continue;
> - // A Mask for subregs covered by the subrange but not the current def.
> - unsigned LRest = S->LaneMask & ~Mask;
> - LiveInterval::SubRange *CommonRange;
> - unsigned CommonRangeIdx;
> - if (LRest != 0) {
> - // Split current subrange into Common and LRest ranges.
> - S->LaneMask = LRest;
> - CommonRange = LI.createSubRangeFrom(*Alloc, Common, *S);
> - CommonRangeIdx = 0;
> - LiveOuts.insert(LiveOuts.begin(), LiveOutData());
> - LiveOuts.front().reset(MF->getNumBlockIDs());
> - ++NumSubRanges;
> - ++SubRangeIdx;
> - } else {
> - // The subrange and current def lanemasks match completely.
> - assert(Common == S->LaneMask);
> - CommonRange = &*S;
> - CommonRangeIdx = SubRangeIdx;
> - }
> - extend(*CommonRange, Idx, Reg, LiveOuts[CommonRangeIdx]);
> - Mask &= ~Common;
> + // Determine the actual place of the use.
> + const MachineInstr *MI = MO.getParent();
> + unsigned OpNo = (&MO - &MI->getOperand(0));
> + SlotIndex UseIdx;
> + if (MI->isPHI()) {
> + assert(!MO.isDef() && "Cannot handle PHI def of partial register.");
> + // The actual place where a phi operand is used is the end of the pred
> + // MBB. PHI operands are paired: (Reg, PredMBB).
> + UseIdx = Indexes->getMBBEndIdx(MI->getOperand(OpNo+1).getMBB());
> + } else {
> + // Check for early-clobber redefs.
> + bool isEarlyClobber = false;
> + unsigned DefIdx;
> + if (MO.isDef())
> + isEarlyClobber = MO.isEarlyClobber();
> + else if (MI->isRegTiedToDefOperand(OpNo, &DefIdx)) {
> + // FIXME: This would be a lot easier if tied early-clobber uses also
> + // had an early-clobber flag.
> + isEarlyClobber = MI->getOperand(DefIdx).isEarlyClobber();
> }
> - assert(SubRangeIdx == NumSubRanges);
> + UseIdx = Indexes->getInstructionIndex(MI).getRegSlot(isEarlyClobber);
> }
> - extend(LI, Idx, Reg, MainLiveOutData);
> +
> + // MI is reading Reg. We may have visited MI before if it happens to be
> + // reading Reg multiple times. That is OK, extend() is idempotent.
> + extend(LR, UseIdx, Reg);
> }
> }
>
>
> -void LiveRangeCalc::updateFromLiveIns(LiveOutData &LiveOuts) {
> +void LiveRangeCalc::updateFromLiveIns() {
> LiveRangeUpdater Updater;
> for (const LiveInBlock &I : LiveIn) {
> if (!I.DomNode)
> @@ -246,8 +207,8 @@ void LiveRangeCalc::updateFromLiveIns(Li
> else {
> // The value is live-through, update LiveOut as well.
> // Defer the Domtree lookup until it is needed.
> - assert(LiveOuts.Seen.test(MBB->getNumber()));
> - LiveOuts.Map[MBB] = LiveOutPair(I.Value, nullptr);
> + assert(Seen.test(MBB->getNumber()));
> + Map[MBB] = LiveOutPair(I.Value, nullptr);
> }
> Updater.setDest(&I.LR);
> Updater.add(Start, End, I.Value);
> @@ -256,8 +217,7 @@ void LiveRangeCalc::updateFromLiveIns(Li
> }
>
>
> -void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Kill, unsigned PhysReg,
> - LiveOutData &LiveOuts) {
> +void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Kill, unsigned PhysReg) {
> assert(Kill.isValid() && "Invalid SlotIndex");
> assert(Indexes && "Missing SlotIndexes");
> assert(DomTree && "Missing dominator tree");
> @@ -273,28 +233,27 @@ void LiveRangeCalc::extend(LiveRange &LR
> // multiple values, and we may need to create even more phi-defs to preserve
> // VNInfo SSA form. Perform a search for all predecessor blocks where we
> // know the dominating VNInfo.
> - if (findReachingDefs(LR, *KillMBB, Kill, PhysReg, LiveOuts))
> + if (findReachingDefs(LR, *KillMBB, Kill, PhysReg))
> return;
>
> // When there were multiple different values, we may need new PHIs.
> - calculateValues(LiveOuts);
> + calculateValues();
> }
>
>
> // This function is called by a client after using the low-level API to add
> // live-out and live-in blocks. The unique value optimization is not
> // available, SplitEditor::transferValues handles that case directly anyway.
> -void LiveRangeCalc::calculateValues(LiveOutData &LiveOuts) {
> +void LiveRangeCalc::calculateValues() {
> assert(Indexes && "Missing SlotIndexes");
> assert(DomTree && "Missing dominator tree");
> - updateSSA(LiveOuts);
> - updateFromLiveIns(LiveOuts);
> + updateSSA();
> + updateFromLiveIns();
> }
>
>
> bool LiveRangeCalc::findReachingDefs(LiveRange &LR, MachineBasicBlock &KillMBB,
> - SlotIndex Kill, unsigned PhysReg,
> - LiveOutData &LiveOuts) {
> + SlotIndex Kill, unsigned PhysReg) {
> unsigned KillMBBNum = KillMBB.getNumber();
>
> // Block numbers where LR should be live-in.
> @@ -328,8 +287,8 @@ bool LiveRangeCalc::findReachingDefs(Liv
> MachineBasicBlock *Pred = *PI;
>
> // Is this a known live-out block?
> - if (LiveOuts.Seen.test(Pred->getNumber())) {
> - if (VNInfo *VNI = LiveOuts.Map[Pred].first) {
> + if (Seen.test(Pred->getNumber())) {
> + if (VNInfo *VNI = Map[Pred].first) {
> if (TheVNI && TheVNI != VNI)
> UniqueVNI = false;
> TheVNI = VNI;
> @@ -343,7 +302,7 @@ bool LiveRangeCalc::findReachingDefs(Liv
> // First time we see Pred. Try to determine the live-out value, but set
> // it as null if Pred is live-through with an unknown value.
> VNInfo *VNI = LR.extendInBlock(Start, End);
> - LiveOuts.setLiveOutValue(Pred, VNI);
> + setLiveOutValue(Pred, VNI);
> if (VNI) {
> if (TheVNI && TheVNI != VNI)
> UniqueVNI = false;
> @@ -378,8 +337,7 @@ bool LiveRangeCalc::findReachingDefs(Liv
> if (*I == KillMBBNum && Kill.isValid())
> End = Kill;
> else
> - LiveOuts.Map[MF->getBlockNumbered(*I)] =
> - LiveOutPair(TheVNI, nullptr);
> + Map[MF->getBlockNumbered(*I)] = LiveOutPair(TheVNI, nullptr);
> Updater.add(Start, End, TheVNI);
> }
> return true;
> @@ -402,7 +360,7 @@ bool LiveRangeCalc::findReachingDefs(Liv
>
> // This is essentially the same iterative algorithm that SSAUpdater uses,
> // except we already have a dominator tree, so we don't have to recompute it.
> -void LiveRangeCalc::updateSSA(LiveOutData &LiveOuts) {
> +void LiveRangeCalc::updateSSA() {
> assert(Indexes && "Missing SlotIndexes");
> assert(DomTree && "Missing dominator tree");
>
> @@ -423,23 +381,22 @@ void LiveRangeCalc::updateSSA(LiveOutDat
>
> // We need a live-in value to a block with no immediate dominator?
> // This is probably an unreachable block that has survived somehow.
> - bool needPHI = !IDom
> - || !LiveOuts.Seen.test(IDom->getBlock()->getNumber());
> + bool needPHI = !IDom || !Seen.test(IDom->getBlock()->getNumber());
>
> // IDom dominates all of our predecessors, but it may not be their
> // immediate dominator. Check if any of them have live-out values that are
> // properly dominated by IDom. If so, we need a phi-def here.
> if (!needPHI) {
> - IDomValue = LiveOuts.Map[IDom->getBlock()];
> + IDomValue = Map[IDom->getBlock()];
>
> // Cache the DomTree node that defined the value.
> if (IDomValue.first && !IDomValue.second)
> - LiveOuts.Map[IDom->getBlock()].second = IDomValue.second =
> + Map[IDom->getBlock()].second = IDomValue.second =
> DomTree->getNode(Indexes->getMBBFromIndex(IDomValue.first->def));
>
> for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
> PE = MBB->pred_end(); PI != PE; ++PI) {
> - LiveOutPair &Value = LiveOuts.Map[*PI];
> + LiveOutPair &Value = Map[*PI];
> if (!Value.first || Value.first == IDomValue.first)
> continue;
>
> @@ -461,7 +418,7 @@ void LiveRangeCalc::updateSSA(LiveOutDat
> // The value may be live-through even if Kill is set, as can happen when
> // we are called from extendRange. In that case LiveOutSeen is true, and
> // LiveOut indicates a foreign or missing value.
> - LiveOutPair &LOP = LiveOuts.Map[MBB];
> + LiveOutPair &LOP = Map[MBB];
>
> // Create a phi-def if required.
> if (needPHI) {
>
> Modified: llvm/trunk/lib/CodeGen/LiveRangeCalc.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveRangeCalc.h?rev=224313&r1=224312&r2=224313&view=diff
> ==============================================================================
> --- llvm/trunk/lib/CodeGen/LiveRangeCalc.h (original)
> +++ llvm/trunk/lib/CodeGen/LiveRangeCalc.h Mon Dec 15 22:03:38 2014
> @@ -47,44 +47,30 @@ class LiveRangeCalc {
> /// LiveOutMap - Map basic blocks to the value leaving the block.
> typedef IndexedMap<LiveOutPair, MBB2NumberFunctor> LiveOutMap;
>
> - struct LiveOutData {
> - /// Seen - Bit vector of active entries in LiveOut, also used as a visited
> - /// set by findReachingDefs. One entry per basic block, indexed by block
> - /// number. This is kept as a separate bit vector because it can be cleared
> - /// quickly when switching live ranges.
> - BitVector Seen;
> -
> - /// LiveOut - Map each basic block where a live range is live out to the
> - /// live-out value and its defining block.
> - ///
> - /// For every basic block, MBB, one of these conditions shall be true:
> - ///
> - /// 1. !Seen.count(MBB->getNumber())
> - /// Blocks without a Seen bit are ignored.
> - /// 2. LiveOut[MBB].second.getNode() == MBB
> - /// The live-out value is defined in MBB.
> - /// 3. forall P in preds(MBB): LiveOut[P] == LiveOut[MBB]
> - /// The live-out value passses through MBB. All predecessors must carry
> - /// the same value.
> - ///
> - /// The domtree node may be null, it can be computed.
> - ///
> - /// The map can be shared by multiple live ranges as long as no two are
> - /// live-out of the same block.
> - LiveOutMap Map;
> -
> - void reset(unsigned NumBlocks) {
> - Seen.clear();
> - Seen.resize(NumBlocks);
> - Map.resize(NumBlocks);
> - }
> -
> - void setLiveOutValue(MachineBasicBlock *MBB, VNInfo *VNI) {
> - Seen.set(MBB->getNumber());
> - Map[MBB] = LiveOutPair(VNI, nullptr);
> - }
> - };
> - LiveOutData MainLiveOutData;
> + /// Bit vector of active entries in LiveOut, also used as a visited set by
> + /// findReachingDefs. One entry per basic block, indexed by block number.
> + /// This is kept as a separate bit vector because it can be cleared quickly
> + /// when switching live ranges.
> + BitVector Seen;
> +
> + /// Map each basic block where a live range is live out to the live-out value
> + /// and its defining block.
> + ///
> + /// For every basic block, MBB, one of these conditions shall be true:
> + ///
> + /// 1. !Seen.count(MBB->getNumber())
> + /// Blocks without a Seen bit are ignored.
> + /// 2. LiveOut[MBB].second.getNode() == MBB
> + /// The live-out value is defined in MBB.
> + /// 3. forall P in preds(MBB): LiveOut[P] == LiveOut[MBB]
> + /// The live-out value passses through MBB. All predecessors must carry
> + /// the same value.
> + ///
> + /// The domtree node may be null, it can be computed.
> + ///
> + /// The map can be shared by multiple live ranges as long as no two are
> + /// live-out of the same block.
> + LiveOutMap Map;
>
> /// LiveInBlock - Information about a basic block where a live range is known
> /// to be live-in, but the value has not yet been determined.
> @@ -126,19 +112,27 @@ class LiveRangeCalc {
> ///
> /// PhysReg, when set, is used to verify live-in lists on basic blocks.
> bool findReachingDefs(LiveRange &LR, MachineBasicBlock &KillMBB,
> - SlotIndex Kill, unsigned PhysReg,
> - LiveOutData &LiveOuts);
> + SlotIndex Kill, unsigned PhysReg);
>
> /// updateSSA - Compute the values that will be live in to all requested
> /// blocks in LiveIn. Create PHI-def values as required to preserve SSA form.
> ///
> /// Every live-in block must be jointly dominated by the added live-out
> /// blocks. No values are read from the live ranges.
> - void updateSSA(LiveOutData &LiveOuts);
> + void updateSSA();
>
> /// Transfer information from the LiveIn vector to the live ranges and update
> /// the given @p LiveOuts.
> - void updateFromLiveIns(LiveOutData &LiveOuts);
> + void updateFromLiveIns();
> +
> + /// Extend the live range of @p LR to reach all uses of Reg.
> + ///
> + /// All uses must be jointly dominated by existing liveness. PHI-defs are
> + /// inserted as needed to preserve SSA form.
> + void extendToUses(LiveRange &LR, unsigned Reg, unsigned LaneMask);
> +
> + /// Reset Map and Seen fields.
> + void resetLiveOutMap();
>
> public:
> LiveRangeCalc() : MF(nullptr), MRI(nullptr), Indexes(nullptr),
> @@ -176,39 +170,25 @@ public:
> /// single existing value, Alloc may be null.
> ///
> /// PhysReg, when set, is used to verify live-in lists on basic blocks.
> - void extend(LiveRange &LR, SlotIndex Kill, unsigned PhysReg,
> - LiveOutData &LiveOuts);
> -
> - void extend(LiveRange &LR, SlotIndex Kill) {
> - extend(LR, Kill, 0, MainLiveOutData);
> - }
> + void extend(LiveRange &LR, SlotIndex Kill, unsigned PhysReg = 0);
>
> /// createDeadDefs - Create a dead def in LI for every def operand of Reg.
> /// Each instruction defining Reg gets a new VNInfo with a corresponding
> /// minimal live range.
> void createDeadDefs(LiveRange &LR, unsigned Reg);
>
> - /// Subregister aware version of createDeadDefs(LiveRange &LR, unsigned Reg).
> - /// If subregister liveness tracking is enabled new subranges are created as
> - /// necessary when subregister defs are found. As with
> - /// createDeadDefs(LiveRange &LR, unsigned Reg) new short live segments are
> - /// created for every def of LI.reg. The new segments start and end at the
> - /// defining instruction (hence the name "DeadDef").
> - void createDeadDefs(LiveInterval &LI);
> -
> - /// extendToUses - Extend the live range of LI to reach all uses of Reg.
> + /// Extend the live range of @p LR to reach all uses of Reg.
> ///
> /// All uses must be jointly dominated by existing liveness. PHI-defs are
> /// inserted as needed to preserve SSA form.
> - void extendToUses(LiveRange &LR, unsigned Reg);
> + void extendToUses(LiveRange &LR, unsigned PhysReg) {
> + extendToUses(LR, PhysReg, ~0u);
> + }
>
> - /// Subregister aware version of extendToUses(LiveRange &LR, unsigned Reg).
> - /// If subregister liveness tracking is enabled new subranges are created
> - /// as necessary when subregister uses are found. As with
> - /// extendToUses(LiveRange &LR, unsigned Reg) the segments existing at the
> - /// defs are extend until they reach all uses. New value numbers are created
> - /// at CFG joins as necessary (SSA construction).
> - void extendToUses(LiveInterval &LI);
> + /// Calculates liveness for the register specified in live interval @p LI.
> + /// Creates subregister live ranges as needed if subreg liveness tracking is
> + /// enabled.
> + void calculate(LiveInterval &LI);
>
> //===--------------------------------------------------------------------===//
> // Low-level interface.
> @@ -230,7 +210,8 @@ public:
> /// VNI may be null only if MBB is a live-through block also passed to
> /// addLiveInBlock().
> void setLiveOutValue(MachineBasicBlock *MBB, VNInfo *VNI) {
> - MainLiveOutData.setLiveOutValue(MBB, VNI);
> + Seen.set(MBB->getNumber());
> + Map[MBB] = LiveOutPair(VNI, nullptr);
> }
>
> /// addLiveInBlock - Add a block with an unknown live-in value. This
> @@ -255,11 +236,7 @@ public:
> ///
> /// Every predecessor of a live-in block must have been given a value with
> /// setLiveOutValue, the value may be null for live-trough blocks.
> - void calculateValues(LiveOutData &LiveOuts);
> -
> - void calculateValues() {
> - calculateValues(MainLiveOutData);
> - }
> + void calculateValues();
> };
>
> } // end namespace llvm
>
>
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