[llvm] r224521 - ARM: fix an off-by-one in the register list access
Saleem Abdulrasool
compnerd at compnerd.org
Thu Dec 18 08:16:53 PST 2014
Author: compnerd
Date: Thu Dec 18 10:16:53 2014
New Revision: 224521
URL: http://llvm.org/viewvc/llvm-project?rev=224521&view=rev
Log:
ARM: fix an off-by-one in the register list access
Fix an off-by-one access introduced in 224502 for push.w and pop.w with single
register operands. Add test cases for both scenarios.
Thanks to Asiri Rathnayake for pointing out the failure!
Modified:
llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
llvm/trunk/test/MC/ARM/thumb-load-store-multiple.s
Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=224521&r1=224520&r2=224521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Thu Dec 18 10:16:53 2014
@@ -6282,10 +6282,10 @@ bool ARMAsmParser::validateInstruction(M
"writeback register not allowed in register list");
if (Opcode == ARM::t2LDMIA_UPD || Opcode == ARM::t2LDMDB_UPD) {
- if (validatetLDMRegList(Inst, Operands, 4))
+ if (validatetLDMRegList(Inst, Operands, 3))
return true;
} else {
- if (validatetSTMRegList(Inst, Operands, 4))
+ if (validatetSTMRegList(Inst, Operands, 3))
return true;
}
break;
Modified: llvm/trunk/test/MC/ARM/thumb-load-store-multiple.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb-load-store-multiple.s?rev=224521&r1=224520&r2=224521&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/thumb-load-store-multiple.s (original)
+++ llvm/trunk/test/MC/ARM/thumb-load-store-multiple.s Thu Dec 18 10:16:53 2014
@@ -1,4 +1,4 @@
-@ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o /dev/null %s 2>&1 \
+@ RUN: not llvm-mc -triple thumbv7-eabi -filetype asm -o - %s 2>&1 \
@ RUN: | FileCheck %s
.syntax unified
@@ -69,10 +69,6 @@ push:
.global pop
.type pop,%function
pop:
- pop {sp}
-@ CHECK-NOT: error: SP may not be in the register list
- pop {sp, pc}
-@ CHECK-NOT: error: SP may not be in the register list
pop {lr, pc}
@ CHECK: error: PC and LR may not be in the register list simultaneously
@ CHECK: pop {lr, pc}
@@ -84,3 +80,15 @@ pop:
@ CHECK: popeq {r1, pc}
@ CHECK: ^
+ .global valid
+ .type valid,%function
+valid:
+ pop {sp}
+@ CHECK: ldr sp, [sp], #4
+ pop {sp, pc}
+@ CHECK: pop.w {sp, pc}
+ push.w {r0}
+@ CHECK: str r0, [sp, #-4]
+ pop.w {r0}
+@ CHECK: ldr r0, [sp], #4
+
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