[PATCH] [mips] Set GCC-compatible MIPS asssembler options before inline asm blocks.

[Daniel Sanders]

LGTM with a couple test improvements.


================
Comment at: test/CodeGen/Mips/inlineasm-assembler-directives.ll:12
@@ +11,3 @@
+; CHECK-NEXT: .set  reorder
+; CHECK:      .set  pop
+; CHECK-NEXT: #NO_APP
----------------
Please check for part of the inline assembly body before checking for the pop

================
Comment at: test/CodeGen/Mips/inlineasmmemop.ll:8
@@ -7,3 +7,3 @@
 entry:
 ; CHECK: addiu $[[T0:[0-9]+]], $sp
 ; CHECK: #APP
----------------
Could you add a CHECK-LABEL for the function label? Likewise for main() below.

================
Comment at: test/CodeGen/Mips/inlineasmmemop.ll:37-52
@@ -36,18 +36,18 @@
 
 ;int b[8] = {0,1,2,3,4,5,6,7};
 ;int main()
 ;{
 ;  int i;
 ; 
 ;  // The first word. Notice, no 'D'
 ;  { asm (
 ;    "lw    %0,%1;\n"
 ;    : "=r" (i) : "m" (*(b+4)));}
 ; 
 ;  // The second word
 ;  { asm (
 ;    "lw    %0,%D1;\n"
 ;    : "=r" (i) "m" (*(b+4)));}
 ;}
 
 @b = common global [20 x i32] zeroinitializer, align 4
----------------
With the possible exception of line 42, this comment doesn't explain anything that isn't also written in the code below and actually disagrees with the code below in a couple details (the number of elements in the array and the order of the inline asm statements). Could you move the useful bit to the code below and delete the remainder in a follow-up?

http://reviews.llvm.org/D6637

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