[PATCH] [ARM] Prevent PerformVCVTCombine from combining a vmul/vcvt with 8 lanes

Bradley Smith bradley.smith at arm.com
Tue Dec 16 03:00:26 PST 2014

Previous message: [PATCH] [ARM] Prevent PerformVCVTCombine from combining a vmul/vcvt with 8 lanes
Next message: [llvm] r224251 - This is the first in a series of patches that add missing disassembler tests for mips platform. The patches are divided per version of mips CPU to keep the patches smaller and ease the review. There are no functional changes, code is changed only if new tests reveal a bug.This patch adds disassembler tests for mips1 CPU.
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http://reviews.llvm.org/D6657

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