[Patch] [SLPVectorizer] Vectorize Horizontal Reductions from Consecutive Loads

[Suyog Kamal Sarda]

Thanks. 

I had identified this issue while working on latest one D6675.
Will make some changes in it and wait for others to review it.

Meanwhile, I will revert 224119 shortly.

Regards,
Suyog

------- Original Message -------
Sender : Chandler Carruth<chandlerc at google.com>
Date : Dec 17, 2014 18:18 (GMT+09:00)
Title : Re: Re: [Patch] [SLPVectorizer] Vectorize Horizontal Reductions from Consecutive Loads



On Wed, Dec 17, 2014 at 1:14 AM, Suyog Kamal Sarda <suyog.sarda at samsung.com> wrote:
Hi Chandler,

Thanks for pointing out the error. I agree to it and will shortly revert the revision.

I have identified this and tried to address this issue - only do this for 'integer' type in
http://reviews.llvm.org/D6675 (Some minor checking changes required here also.)

Do you agree with http://reviews.llvm.org/D6675  ?

I'm not an expert in the SLP vectorizer, and not likely to be able to tell you what the right way to check for these things are. You should get a detailed review from someone who at least knows that code.


All I can tell you is that the basic premise for when this is allowed should be:


1) when we have integer types (add vs. fadd)
2) when the fadd is marked with fast math flags that allow reassociation (the 'fast' flag)


It would be good to support this for floating point types when we have fast math flags. =] That case does come up, and this is a huge win in those cases.


-Chandler