[PATCH] combine consecutive subvector 16-byte loads into one 32-byte load (PR21709)

[Sanjay Patel]

Removed 'TODO' comment. Added patterns to match all AVX/AVX2 vector types. Added test cases for each pattern. Please let me know if there's a more efficient way to do this. Thanks!


http://reviews.llvm.org/D6492

Files:
  lib/Target/X86/X86InstrInfo.td
  lib/Target/X86/X86InstrSSE.td
  test/CodeGen/X86/unaligned-32-byte-memops.ll

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