[compiler-rt] r224242 - [UBSan][MIPS] Adding support of MIPS64 in UBSan testing

Kumar Sukhani kumarsukhani at gmail.com
Mon Dec 15 02:52:06 PST 2014


Author: sdkie
Date: Mon Dec 15 04:52:06 2014
New Revision: 224242

URL: http://llvm.org/viewvc/llvm-project?rev=224242&view=rev
Log:
[UBSan][MIPS] Adding support of MIPS64 in UBSan testing

On mips64 addresses are 40-bit. Where as a 48 bit address is used in TypeCheck/misaligned.cpp.
Using regular expression for that address.

reviewed by : samsonov
submitted by: sagar

Modified:
    compiler-rt/trunk/test/ubsan/TestCases/TypeCheck/misaligned.cpp

Modified: compiler-rt/trunk/test/ubsan/TestCases/TypeCheck/misaligned.cpp
URL: http://llvm.org/viewvc/llvm-project/compiler-rt/trunk/test/ubsan/TestCases/TypeCheck/misaligned.cpp?rev=224242&r1=224241&r2=224242&view=diff
==============================================================================
--- compiler-rt/trunk/test/ubsan/TestCases/TypeCheck/misaligned.cpp (original)
+++ compiler-rt/trunk/test/ubsan/TestCases/TypeCheck/misaligned.cpp Mon Dec 15 04:52:06 2014
@@ -97,8 +97,8 @@ int main(int, char **argv) {
   }
 
   case 'w':
-    // CHECK-WILD: misaligned.cpp:[[@LINE+3]]:35: runtime error: member access within misaligned address 0x000000000123 for type 'S', which requires 4 byte alignment
-    // CHECK-WILD-NEXT: 0x000000000123: note: pointer points here
+    // CHECK-WILD: misaligned.cpp:[[@LINE+3]]:35: runtime error: member access within misaligned address 0x{{0+}}123 for type 'S', which requires 4 byte alignment
+    // CHECK-WILD-NEXT: 0x{{0+}}123: note: pointer points here
     // CHECK-WILD-NEXT: <memory cannot be printed>
     return static_cast<S*>(wild)->k;
   }





More information about the llvm-commits mailing list