[llvm] r224218 - Loop Vectorizer minor changes in the code -

[Elena Demikhovsky]

Author: delena
Date: Sun Dec 14 03:43:50 2014
New Revision: 224218

URL: http://llvm.org/viewvc/llvm-project?rev=224218&view=rev
Log:
Loop Vectorizer minor changes in the code - 
some comments, function names, identation.

Reviewed here: http://reviews.llvm.org/D6527

Modified:
    llvm/trunk/include/llvm/Analysis/TargetTransformInfo.h
    llvm/trunk/lib/Analysis/TargetTransformInfo.cpp
    llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp
    llvm/trunk/lib/Transforms/Vectorize/LoopVectorize.cpp

Modified: llvm/trunk/include/llvm/Analysis/TargetTransformInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Analysis/TargetTransformInfo.h?rev=224218&r1=224217&r2=224218&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Analysis/TargetTransformInfo.h (original)
+++ llvm/trunk/include/llvm/Analysis/TargetTransformInfo.h Sun Dec 14 03:43:50 2014
@@ -274,8 +274,8 @@ public:
   /// AVX2 allows masks for consecutive load and store for i32 and i64 elements.
   /// AVX-512 architecture will also allow masks for non-consecutive memory
   /// accesses.
-  virtual bool isLegalPredicatedStore(Type *DataType, int Consecutive) const;
-  virtual bool isLegalPredicatedLoad (Type *DataType, int Consecutive) const;
+  virtual bool isLegalMaskedStore(Type *DataType, int Consecutive) const;
+  virtual bool isLegalMaskedLoad (Type *DataType, int Consecutive) const;
 
   /// \brief Return the cost of the scaling factor used in the addressing
   /// mode represented by AM for this target, for a load/store

Modified: llvm/trunk/lib/Analysis/TargetTransformInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/TargetTransformInfo.cpp?rev=224218&r1=224217&r2=224218&view=diff
==============================================================================
--- llvm/trunk/lib/Analysis/TargetTransformInfo.cpp (original)
+++ llvm/trunk/lib/Analysis/TargetTransformInfo.cpp Sun Dec 14 03:43:50 2014
@@ -101,13 +101,13 @@ bool TargetTransformInfo::isLegalICmpImm
   return PrevTTI->isLegalICmpImmediate(Imm);
 }
 
-bool TargetTransformInfo::isLegalPredicatedLoad(Type *DataType,
-                                                int Consecutive) const {
+bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType,
+                                            int Consecutive) const {
   return false;
 }
 
-bool TargetTransformInfo::isLegalPredicatedStore(Type *DataType,
-                                                 int Consecutive) const {
+bool TargetTransformInfo::isLegalMaskedStore(Type *DataType,
+                                             int Consecutive) const {
   return false;
 }
 

Modified: llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp?rev=224218&r1=224217&r2=224218&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetTransformInfo.cpp Sun Dec 14 03:43:50 2014
@@ -111,8 +111,8 @@ public:
                          Type *Ty) const override;
   unsigned getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
                          Type *Ty) const override;
-  bool isLegalPredicatedLoad (Type *DataType, int Consecutive) const override;
-  bool isLegalPredicatedStore(Type *DataType, int Consecutive) const override;
+  bool isLegalMaskedLoad (Type *DataType, int Consecutive) const override;
+  bool isLegalMaskedStore(Type *DataType, int Consecutive) const override;
 
   /// @}
 };
@@ -1159,7 +1159,7 @@ unsigned X86TTI::getIntImmCost(Intrinsic
   return X86TTI::getIntImmCost(Imm, Ty);
 }
 
-bool X86TTI::isLegalPredicatedLoad(Type *DataType, int Consecutive) const {
+bool X86TTI::isLegalMaskedLoad(Type *DataType, int Consecutive) const {
   int ScalarWidth = DataType->getScalarSizeInBits();
   
   // Todo: AVX512 allows gather/scatter, works with strided and random as well
@@ -1170,7 +1170,7 @@ bool X86TTI::isLegalPredicatedLoad(Type
   return false;
 }
 
-bool X86TTI::isLegalPredicatedStore(Type *DataType, int Consecutive) const {
-  return isLegalPredicatedLoad(DataType, Consecutive);
+bool X86TTI::isLegalMaskedStore(Type *DataType, int Consecutive) const {
+  return isLegalMaskedLoad(DataType, Consecutive);
 }
 

Modified: llvm/trunk/lib/Transforms/Vectorize/LoopVectorize.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Vectorize/LoopVectorize.cpp?rev=224218&r1=224217&r2=224218&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Vectorize/LoopVectorize.cpp (original)
+++ llvm/trunk/lib/Transforms/Vectorize/LoopVectorize.cpp Sun Dec 14 03:43:50 2014
@@ -1871,7 +1871,7 @@ void InnerLoopVectorizer::vectorizeMemor
 
     if (Reverse) {
       // If the address is consecutive but reversed, then the
-      // wide store needs to start at the last vector element.
+      // wide load needs to start at the last vector element.
       PartPtr = Builder.CreateGEP(Ptr, Builder.getInt32(-Part * VF));
       PartPtr = Builder.CreateGEP(PartPtr, Builder.getInt32(1 - VF));
     }
@@ -5341,7 +5341,7 @@ bool LoopVectorizationLegality::blockCan
     case Instruction::SDiv:
     case Instruction::URem:
     case Instruction::SRem:
-             return false;
+      return false;
     }
   }
 
@@ -5385,7 +5385,7 @@ LoopVectorizationCostModel::selectVector
     MaxVectorSize = 1;
   }
 
-  assert(MaxVectorSize <= 32 && "Did not expect to pack so many elements"
+  assert(MaxVectorSize <= 64 && "Did not expect to pack so many elements"
          " into one vector!");
 
   unsigned VF = MaxVectorSize;