[PATCH] [ARM] Combine base-updating/post-incrementing vector load/stores.

Ahmed Bougacha ahmed.bougacha at gmail.com
Tue Dec 9 14:12:26 PST 2014


We used to only combine intrinsics, and turn them into VLD1_UPD/VST1_UPD
when the base pointer is incremented after the load/store.

We can do the same thing for generic load/stores.

Note that we can only combine the first load/store+adds pair in
a sequence (as might be generated for a v16f32 load for instance),
because other combines turn the base pointer addition chain (each
computing the address of the next load, from the address of the last
load) into independent additions (common base pointer + this load's
offset).

http://reviews.llvm.org/D6585

Files:
  lib/Target/ARM/ARMISelLowering.cpp
  test/CodeGen/ARM/alloc-no-stack-realign.ll
  test/CodeGen/ARM/memcpy-inline.ll
  test/CodeGen/ARM/vector-load.ll
  test/CodeGen/ARM/vector-store.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D6585.17097.patch
Type: text/x-patch
Size: 20705 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20141209/2cdafdf9/attachment.bin>


More information about the llvm-commits mailing list