[llvm] r223774 - [x86] Fix the test to actually test things for the CPU names, add the

[Chandler Carruth]

Author: chandlerc
Date: Tue Dec  9 08:25:55 2014
New Revision: 223774

URL: http://llvm.org/viewvc/llvm-project?rev=223774&view=rev
Log:
[x86] Fix the test to actually test things for the CPU names, add the
missing barcelona CPU which that test uncovered, and remove the 32-bit
x86 CPUs which I really wasn't prepared to audit and test thoroughly.

If anyone wants to clean up the 32-bit only x86 CPUs, go for it.

Also, if anyone else wants to try to de-duplicate the AMD CPUs, that'd
be cool, but from the looks of it wouldn't save as much as it did for
the Intel CPUs.

Modified:
    llvm/trunk/lib/Target/X86/X86.td
    llvm/trunk/test/CodeGen/X86/cpus.ll

Modified: llvm/trunk/lib/Target/X86/X86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=223774&r1=223773&r2=223774&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86.td (original)
+++ llvm/trunk/lib/Target/X86/X86.td Tue Dec  9 08:25:55 2014
@@ -433,6 +433,10 @@ def : Proc<"amdfam10",        [FeatureSS
                                Feature3DNowA, FeatureCMPXCHG16B, FeatureLZCNT,
                                FeaturePOPCNT, FeatureSlowBTMem,
                                FeatureSlowSHLD]>;
+def : Proc<"barcelona",       [FeatureSSE4A,
+                               Feature3DNowA, FeatureCMPXCHG16B, FeatureLZCNT,
+                               FeaturePOPCNT, FeatureSlowBTMem,
+                               FeatureSlowSHLD]>;
 // Bobcat
 def : Proc<"btver1",          [FeatureSSSE3, FeatureSSE4A, FeatureCMPXCHG16B,
                                FeaturePRFCHW, FeatureLZCNT, FeaturePOPCNT,

Modified: llvm/trunk/test/CodeGen/X86/cpus.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/cpus.ll?rev=223774&r1=223773&r2=223774&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/cpus.ll (original)
+++ llvm/trunk/test/CodeGen/X86/cpus.ll Tue Dec  9 08:25:55 2014
@@ -1,32 +1,28 @@
-; RUN: llc < %s -o /dev/null -mcpu=prescott
-; RUN: llc < %s -o /dev/null -mcpu=nocona
-; RUN: llc < %s -o /dev/null -mcpu=core2
-; RUN: llc < %s -o /dev/null -mcpu=penryn
-; RUN: llc < %s -o /dev/null -mcpu=nehalem
-; RUN: llc < %s -o /dev/null -mcpu=westmere
-; RUN: llc < %s -o /dev/null -mcpu=sandybridge
-; RUN: llc < %s -o /dev/null -mcpu=ivybridge
-; RUN: llc < %s -o /dev/null -mcpu=haswell
-; RUN: llc < %s -o /dev/null -mcpu=broadwell
-; RUN: llc < %s -o /dev/null -mcpu=bonnell
-; RUN: llc < %s -o /dev/null -mcpu=silvermont
-; RUN: llc < %s -o /dev/null -mcpu=k8
-; RUN: llc < %s -o /dev/null -mcpu=opteron
-; RUN: llc < %s -o /dev/null -mcpu=athlon64
-; RUN: llc < %s -o /dev/null -mcpu=athlon-fx
-; RUN: llc < %s -o /dev/null -mcpu=k8-sse3
-; RUN: llc < %s -o /dev/null -mcpu=opteron-sse3
-; RUN: llc < %s -o /dev/null -mcpu=athlon64-sse3
-; RUN: llc < %s -o /dev/null -mcpu=amdfam10
-; RUN: llc < %s -o /dev/null -mcpu=barcelona
-; RUN: llc < %s -o /dev/null -mcpu=bdver1
-; RUN: llc < %s -o /dev/null -mcpu=bdver2
-; RUN: llc < %s -o /dev/null -mcpu=bdver3
-; RUN: llc < %s -o /dev/null -mcpu=bdver4
-; RUN: llc < %s -o /dev/null -mcpu=btver1
-; RUN: llc < %s -o /dev/null -mcpu=btver2
-; RUN: llc < %s -o /dev/null -mcpu=winchip-c6
-; RUN: llc < %s -o /dev/null -mcpu=winchip2
-; RUN: llc < %s -o /dev/null -mcpu=c3
-; RUN: llc < %s -o /dev/null -mcpu=c3-2
-; RUN: llc < %s -o /dev/null -mcpu=geode
+; Test that the CPU names work.
+;
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=nocona 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core2 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=penryn 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=nehalem 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=westmere 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=sandybridge 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=ivybridge 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=haswell 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=broadwell 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bonnell 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=silvermont 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k8 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=opteron 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon64 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-fx 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k8-sse3 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=opteron-sse3 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon64-sse3 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=amdfam10 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=barcelona 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver1 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver2 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver3 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver4 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=btver1 2>&1 | count 0
+; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=btver2 2>&1 | count 0