[llvm] r223199 - StructurizeCFG: Use LoopInfo analysis for better loop detection
Tom Stellard
thomas.stellard at amd.com
Tue Dec 2 20:28:32 PST 2014
Author: tstellar
Date: Tue Dec 2 22:28:32 2014
New Revision: 223199
URL: http://llvm.org/viewvc/llvm-project?rev=223199&view=rev
Log:
StructurizeCFG: Use LoopInfo analysis for better loop detection
We were assuming that each back-edge in a region represented a unique
loop, which is not always the case. We need to use LoopInfo to
correctly determine which back-edges are loops.
Added:
llvm/trunk/test/Transforms/StructurizeCFG/one-loop-multiple-backedges.ll
Modified:
llvm/trunk/lib/Transforms/Scalar/StructurizeCFG.cpp
Modified: llvm/trunk/lib/Transforms/Scalar/StructurizeCFG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/StructurizeCFG.cpp?rev=223199&r1=223198&r2=223199&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/StructurizeCFG.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/StructurizeCFG.cpp Tue Dec 2 22:28:32 2014
@@ -10,6 +10,7 @@
#include "llvm/Transforms/Scalar.h"
#include "llvm/ADT/MapVector.h"
#include "llvm/ADT/SCCIterator.h"
+#include "llvm/Analysis/LoopInfo.h"
#include "llvm/Analysis/RegionInfo.h"
#include "llvm/Analysis/RegionIterator.h"
#include "llvm/Analysis/RegionPass.h"
@@ -166,6 +167,7 @@ class StructurizeCFG : public RegionPass
Region *ParentRegion;
DominatorTree *DT;
+ LoopInfo *LI;
RNVector Order;
BBSet Visited;
@@ -247,6 +249,7 @@ public:
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequiredID(LowerSwitchID);
AU.addRequired<DominatorTreeWrapperPass>();
+ AU.addRequired<LoopInfo>();
AU.addPreserved<DominatorTreeWrapperPass>();
RegionPass::getAnalysisUsage(AU);
}
@@ -301,8 +304,9 @@ void StructurizeCFG::analyzeLoops(Region
for (unsigned i = 0, e = Term->getNumSuccessors(); i != e; ++i) {
BasicBlock *Succ = Term->getSuccessor(i);
- if (Visited.count(Succ))
+ if (Visited.count(Succ) && LI->isLoopHeader(Succ) ) {
Loops[Succ] = BB;
+ }
}
}
}
@@ -862,6 +866,7 @@ bool StructurizeCFG::runOnRegion(Region
ParentRegion = R;
DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
+ LI = &getAnalysis<LoopInfo>();
orderNodes();
collectInfos();
Added: llvm/trunk/test/Transforms/StructurizeCFG/one-loop-multiple-backedges.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/StructurizeCFG/one-loop-multiple-backedges.ll?rev=223199&view=auto
==============================================================================
--- llvm/trunk/test/Transforms/StructurizeCFG/one-loop-multiple-backedges.ll (added)
+++ llvm/trunk/test/Transforms/StructurizeCFG/one-loop-multiple-backedges.ll Tue Dec 2 22:28:32 2014
@@ -0,0 +1,41 @@
+; RUN: opt -S -structurizecfg %s -o - | FileCheck %s
+
+; CHECK-NOT: br i1 true
+
+define void @blam(i32 addrspace(1)* nocapture %arg, float %arg1, float %arg2) {
+; CHECK: bb:
+bb:
+ br label %bb3
+
+; CHECK: bb3:
+bb3: ; preds = %bb7, %bb
+ %tmp = phi i64 [ 0, %bb ], [ %tmp8, %bb7 ]
+ %tmp4 = fcmp ult float %arg1, 3.500000e+00
+; CHECK: br i1 %tmp4, label %bb7, label %Flow
+ br i1 %tmp4, label %bb7, label %bb5
+
+; CHECK: Flow:
+; CHECK: br i1 %2, label %Flow1, label %bb3
+
+; CHECK: Flow1:
+; CHECK: br i1 %3, label %bb5, label %bb10
+
+; CHECK: bb5:
+bb5: ; preds = %bb3
+ %tmp6 = fcmp olt float 0.000000e+00, %arg2
+; CHECK: br label %bb10
+ br i1 %tmp6, label %bb10, label %bb7
+
+; CHECK: bb7
+bb7: ; preds = %bb5, %bb3
+ %tmp8 = add nuw nsw i64 %tmp, 1
+ %tmp9 = icmp slt i64 %tmp8, 5
+; CHECK: br label %Flow
+ br i1 %tmp9, label %bb3, label %bb10
+
+; CHECK: bb10
+bb10: ; preds = %bb7, %bb5
+ %tmp11 = phi i32 [ 15, %bb5 ], [ 255, %bb7 ]
+ store i32 %tmp11, i32 addrspace(1)* %arg, align 4
+ ret void
+}
More information about the llvm-commits
mailing list