[PATCH] [X86] Refactor PMOV[SZ]Xrm to add missing AVX2 patterns.

[Ahmed Bougacha]

Hi Elena!
So, any thoughts on the sse41.ll tests and associated patterns?

To recap:
- the vzmovl patterns fire on code with scalar loads:

```
	%0 = load i64* %p
	%tmp2 = insertelement <2 x i64> zeroinitializer, i64 %0, i32 0
	%1 = bitcast <2 x i64> %tmp2 to <8 x i16>
	%2 = call <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16> %1)
```
- the vzload patterns fire on the same code, but in 32-bit mode
- the loadf64 patterns fire on vector loads of a 64-bit type, in 32-bit mode (where load f64 is legal, but load i64 isn't):

```
 %X = load <2 x i32>* %ptr
 %Y = sext <2 x i32> %X to <2 x i64>
```

The other patterns cover the expected scalar load + extension, or vector load + extension (for intrinsics).

-Ahmed

http://reviews.llvm.org/D6125