[llvm] r222953 - [mips][microMIPS] Implement NOP aliases
Jozef Kolek
jozef.kolek at imgtec.com
Sat Nov 29 05:29:28 PST 2014
Author: jkolek
Date: Sat Nov 29 07:29:24 2014
New Revision: 222953
URL: http://llvm.org/viewvc/llvm-project?rev=222953&view=rev
Log:
[mips][microMIPS] Implement NOP aliases
This patch implements microMIPS 16-bit (MOVE16 $0, $0) and
32-bit (SLL $0, $0, 0) NOP aliases.
http://reviews.llvm.org/D6440
Modified:
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
llvm/trunk/test/MC/Disassembler/Mips/micromips.txt
llvm/trunk/test/MC/Disassembler/Mips/micromips_le.txt
llvm/trunk/test/MC/Mips/micromips-16-bit-instructions.s
llvm/trunk/test/MC/Mips/micromips-branch-instructions.s
llvm/trunk/test/MC/Mips/micromips-jump-instructions.s
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp?rev=222953&r1=222952&r2=222953&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp Sat Nov 29 07:29:24 2014
@@ -173,7 +173,8 @@ EncodeInstruction(const MCInst &MI, raw_
// Unfortunately in MIPS both NOP and SLL will come in with Binary == 0
// so we have to special check for them.
unsigned Opcode = TmpInst.getOpcode();
- if ((Opcode != Mips::NOP) && (Opcode != Mips::SLL) && !Binary)
+ if ((Opcode != Mips::NOP) && (Opcode != Mips::SLL) &&
+ (Opcode != Mips::SLL_MM) && !Binary)
llvm_unreachable("unimplemented opcode in EncodeInstruction()");
if (STI.getFeatureBits() & Mips::FeatureMicroMips) {
Modified: llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td?rev=222953&r1=222952&r2=222953&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td Sat Nov 29 07:29:24 2014
@@ -710,4 +710,6 @@ def : MipsPat<(srl GPR32:$src, immZExt5:
//===----------------------------------------------------------------------===//
def : MipsInstAlias<"wait", (WAIT_MM 0x0), 1>;
+ def : MipsInstAlias<"nop", (SLL_MM ZERO, ZERO, 0), 1>;
+ def : MipsInstAlias<"nop", (MOVE16_MM ZERO, ZERO), 1>;
}
Modified: llvm/trunk/test/MC/Disassembler/Mips/micromips.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/micromips.txt?rev=222953&r1=222952&r2=222953&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/Mips/micromips.txt (original)
+++ llvm/trunk/test/MC/Disassembler/Mips/micromips.txt Sat Nov 29 07:29:24 2014
@@ -322,6 +322,9 @@
# CHECK: swm32 $16, $17, 8($4)
0x20 0x44 0xd0 0x08
+# CHECK: nop
+0x00 0x00 0x00 0x00
+
# CHECK: addu16 $6, $17, $4
0x07 0x42
@@ -408,3 +411,6 @@
# CHECK: addius5 $7, -2
0x4c 0xfc
+
+# CHECK: nop
+0x0c 0x00
Modified: llvm/trunk/test/MC/Disassembler/Mips/micromips_le.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/Mips/micromips_le.txt?rev=222953&r1=222952&r2=222953&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/Mips/micromips_le.txt (original)
+++ llvm/trunk/test/MC/Disassembler/Mips/micromips_le.txt Sat Nov 29 07:29:24 2014
@@ -322,6 +322,9 @@
# CHECK: swm32 $16, $17, 8($4)
0x44 0x20 0x08 0xd0
+# CHECK: nop
+0x00 0x00 0x00 0x00
+
# CHECK: addu16 $6, $17, $4
0x42 0x07
@@ -408,3 +411,6 @@
# CHECK: addius5 $7, -2
0xfc 0x4c
+
+# CHECK: nop
+0x00 0x0c
Modified: llvm/trunk/test/MC/Mips/micromips-16-bit-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips-16-bit-instructions.s?rev=222953&r1=222952&r2=222953&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips-16-bit-instructions.s (original)
+++ llvm/trunk/test/MC/Mips/micromips-16-bit-instructions.s Sat Nov 29 07:29:24 2014
@@ -40,7 +40,7 @@
# CHECK-NEXT: jalr $9 # encoding: [0xc9,0x45]
# CHECK-EL: jraddiusp 20 # encoding: [0x05,0x47]
# CHECK-NEXT: jalrs16 $9 # encoding: [0xe9,0x45]
-# CHECK-EL: move $zero, $zero # encoding: [0x00,0x0c]
+# CHECK-EL: nop # encoding: [0x00,0x0c]
# CHECK-EL: jr16 $9 # encoding: [0x89,0x45]
# CHECK-EL: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-EL: break16 8 # encoding: [0x88,0x46]
@@ -79,7 +79,7 @@
# CHECK-NEXT: jalr $9 # encoding: [0x45,0xc9]
# CHECK-EB: jraddiusp 20 # encoding: [0x47,0x05]
# CHECK-NEXT: jalrs16 $9 # encoding: [0x45,0xe9]
-# CHECK-EB: move $zero, $zero # encoding: [0x0c,0x00]
+# CHECK-EB: nop # encoding: [0x0c,0x00]
# CHECK-EB: jr16 $9 # encoding: [0x45,0x89]
# CHECK-EB: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-EB: break16 8 # encoding: [0x46,0x88]
Modified: llvm/trunk/test/MC/Mips/micromips-branch-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips-branch-instructions.s?rev=222953&r1=222952&r2=222953&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips-branch-instructions.s (original)
+++ llvm/trunk/test/MC/Mips/micromips-branch-instructions.s Sat Nov 29 07:29:24 2014
@@ -30,9 +30,9 @@
# CHECK-EL: bltz $6, 1332 # encoding: [0x06,0x40,0x9a,0x02]
# CHECK-EL: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-EL: bgezals $6, 1332 # encoding: [0x66,0x42,0x9a,0x02]
-# CHECK-EL: move $zero, $zero # encoding: [0x00,0x0c]
+# CHECK-EL: nop # encoding: [0x00,0x0c]
# CHECK-EL: bltzals $6, 1332 # encoding: [0x26,0x42,0x9a,0x02]
-# CHECK-EL: move $zero, $zero # encoding: [0x00,0x0c]
+# CHECK-EL: nop # encoding: [0x00,0x0c]
#------------------------------------------------------------------------------
# Big endian
#------------------------------------------------------------------------------
@@ -57,9 +57,9 @@
# CHECK-EB: bltz $6, 1332 # encoding: [0x40,0x06,0x02,0x9a]
# CHECK-EB: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-EB: bgezals $6, 1332 # encoding: [0x42,0x66,0x02,0x9a]
-# CHECK-EB: move $zero, $zero # encoding: [0x0c,0x00]
+# CHECK-EB: nop # encoding: [0x0c,0x00]
# CHECK-EB: bltzals $6, 1332 # encoding: [0x42,0x26,0x02,0x9a]
-# CHECK-EB: move $zero, $zero # encoding: [0x0c,0x00]
+# CHECK-EB: nop # encoding: [0x0c,0x00]
b 1332
beq $9,$6,1332
Modified: llvm/trunk/test/MC/Mips/micromips-jump-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips-jump-instructions.s?rev=222953&r1=222952&r2=222953&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips-jump-instructions.s (original)
+++ llvm/trunk/test/MC/Mips/micromips-jump-instructions.s Sat Nov 29 07:29:24 2014
@@ -20,9 +20,9 @@
# CHECK-EL: jr $7 # encoding: [0x07,0x00,0x3c,0x0f]
# CHECK-EL: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-EL: jals 1328 # encoding: [0x00,0x74,0x98,0x02]
-# CHECK-EL: move $zero, $zero # encoding: [0x00,0x0c]
+# CHECK-EL: nop # encoding: [0x00,0x0c]
# CHECK-EL: jalrs $ra, $6 # encoding: [0xe6,0x03,0x3c,0x4f]
-# CHECK-EL: move $zero, $zero # encoding: [0x00,0x0c]
+# CHECK-EL: nop # encoding: [0x00,0x0c]
#------------------------------------------------------------------------------
# Big endian
#------------------------------------------------------------------------------
@@ -37,9 +37,9 @@
# CHECK-EB: jr $7 # encoding: [0x00,0x07,0x0f,0x3c]
# CHECK-EB: nop # encoding: [0x00,0x00,0x00,0x00]
# CHECK-EB: jals 1328 # encoding: [0x74,0x00,0x02,0x98]
-# CHECK-EB: move $zero, $zero # encoding: [0x0c,0x00]
+# CHECK-EB: nop # encoding: [0x0c,0x00]
# CHECK-EB: jalrs $ra, $6 # encoding: [0x03,0xe6,0x4f,0x3c]
-# CHECK-EB: move $zero, $zero # encoding: [0x0c,0x00]
+# CHECK-EB: nop # encoding: [0x0c,0x00]
j 1328
jal 1328
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