[PATCH] Add Thumb HVC and ERET virtualisation extension instructions.

[Tim Northover]

================
Comment at: test/MC/Disassembler/ARM/virtexts-thumb.txt:20-23
@@ +19,6 @@
+#------------------------------------------------------------------------------
+# ERET is the prefered form for SUBS PC, LR, #0 for cores that support
+# virtualization extensions. The ARM backend currently has problems with
+# printing instruction aliases. Until that is fixed, ERET will be emitted as
+# SUBS PC, LR, #0.
+
----------------
Is this comment consistent with what you're actually checking? It looks like we are successfully emitting ERET now if this test passes.

http://reviews.llvm.org/D6450