[llvm] r222900 - [mips][microMIPS] Implement BREAK16 and SDBBP16 instructions
Jozef Kolek
jozef.kolek at imgtec.com
Thu Nov 27 10:18:42 PST 2014
Author: jkolek
Date: Thu Nov 27 12:18:42 2014
New Revision: 222900
URL: http://llvm.org/viewvc/llvm-project?rev=222900&view=rev
Log:
[mips][microMIPS] Implement BREAK16 and SDBBP16 instructions
Patch by Radovan Obradovic.
Differential Revision: http://reviews.llvm.org/D5048
Modified:
llvm/trunk/lib/Target/Mips/MicroMipsInstrFormats.td
llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
llvm/trunk/test/MC/Mips/micromips-16-bit-instructions.s
Modified: llvm/trunk/lib/Target/Mips/MicroMipsInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MicroMipsInstrFormats.td?rev=222900&r1=222899&r2=222900&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MicroMipsInstrFormats.td (original)
+++ llvm/trunk/lib/Target/Mips/MicroMipsInstrFormats.td Thu Nov 27 12:18:42 2014
@@ -207,6 +207,15 @@ class ADDIUR1SP_FM_MM16 {
let Inst{0} = 1;
}
+class BRKSDBBP16_FM_MM<bits<6> op> {
+ bits<4> code_;
+ bits<16> Inst;
+
+ let Inst{15-10} = 0x11;
+ let Inst{9-4} = op;
+ let Inst{3-0} = code_;
+}
+
//===----------------------------------------------------------------------===//
// MicroMIPS 32-bit Instruction Formats
//===----------------------------------------------------------------------===//
Modified: llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td?rev=222900&r1=222899&r2=222900&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/MicroMipsInstrInfo.td Thu Nov 27 12:18:42 2014
@@ -296,6 +296,12 @@ class JumpRegCMM16<string opstr, Registe
let isIndirectBranch = 1;
}
+// Break16 and Sdbbp16
+class BrkSdbbp16MM<string opstr> :
+ MicroMipsInst16<(outs), (ins uimm4:$code_),
+ !strconcat(opstr, "\t$code_"),
+ [], NoItinerary, FrmOther>;
+
// MicroMIPS Jump and Link (Call) - Short Delay Slot
let isCall = 1, hasDelaySlot = 1, Defs = [RA] in {
class JumpLinkMM<string opstr, DAGOperand opnd> :
@@ -392,6 +398,8 @@ def JALRS16_MM : JumpLinkRegSMM16<"jalrs
def JRC16_MM : JumpRegCMM16<"jrc", GPR32Opnd>, JALR_FM_MM16<0x0d>;
def JRADDIUSP : JumpRAddiuStackMM16, JRADDIUSP_FM_MM16<0x18>;
def JR16_MM : JumpRegMM16<"jr16", GPR32Opnd>, JALR_FM_MM16<0x0c>;
+def BREAK16_MM : BrkSdbbp16MM<"break16">, BRKSDBBP16_FM_MM<0x28>;
+def SDBBP16_MM : BrkSdbbp16MM<"sdbbp16">, BRKSDBBP16_FM_MM<0x2C>;
class WaitMM<string opstr> :
InstSE<(outs), (ins uimm10:$code_), !strconcat(opstr, "\t$code_"), [],
Modified: llvm/trunk/test/MC/Mips/micromips-16-bit-instructions.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Mips/micromips-16-bit-instructions.s?rev=222900&r1=222899&r2=222900&view=diff
==============================================================================
--- llvm/trunk/test/MC/Mips/micromips-16-bit-instructions.s (original)
+++ llvm/trunk/test/MC/Mips/micromips-16-bit-instructions.s Thu Nov 27 12:18:42 2014
@@ -43,6 +43,8 @@
# CHECK-EL: move $zero, $zero # encoding: [0x00,0x0c]
# CHECK-EL: jr16 $9 # encoding: [0x89,0x45]
# CHECK-EL: nop # encoding: [0x00,0x00,0x00,0x00]
+# CHECK-EL: break16 8 # encoding: [0x88,0x46]
+# CHECK-EL: sdbbp16 14 # encoding: [0xce,0x46]
#------------------------------------------------------------------------------
# Big endian
#------------------------------------------------------------------------------
@@ -80,6 +82,8 @@
# CHECK-EB: move $zero, $zero # encoding: [0x0c,0x00]
# CHECK-EB: jr16 $9 # encoding: [0x45,0x89]
# CHECK-EB: nop # encoding: [0x00,0x00,0x00,0x00]
+# CHECK-EB: break16 8 # encoding: [0x46,0x88]
+# CHECK-EB: sdbbp16 14 # encoding: [0x46,0xce]
addu16 $6, $17, $4
subu16 $5, $16, $3
@@ -113,3 +117,5 @@
jraddiusp 20
jalrs16 $9
jr16 $9
+ break16 8
+ sdbbp16 14
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