[PATCH] [mips][microMIPS] Implement disassembler support for 16-bit instructions LI16, ADDIUR1SP, ADDIUR2 and ADDIUS5

[Sasa Stankovic]

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Comment at: lib/Target/Mips/Disassembler/MipsDisassembler.cpp:291
@@ +290,3 @@
+static DecodeStatus DecodeAddiur2Simm7(MCInst &Inst,
+                                       unsigned Insn,
+                                       uint64_t Address,
----------------
You can place all parameters on 2 lines.

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Comment at: lib/Target/Mips/Disassembler/MipsDisassembler.cpp:296
@@ +295,3 @@
+static DecodeStatus DecodeUImm6Lsl2(MCInst &Inst,
+                                    unsigned Insn,
+                                    uint64_t Address,
----------------
Same here (and several cases below).

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Comment at: lib/Target/Mips/Disassembler/MipsDisassembler.cpp:1446
@@ +1445,3 @@
+                                       uint64_t Address,
+                                       const void *Decoder) {
+  unsigned Value = Insn & 0x7;
----------------
You don't need this instruction. Insn already contains 3-bit value extracted from the corresponding 3-bit instruction field.

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Comment at: lib/Target/Mips/Disassembler/MipsDisassembler.cpp:1460
@@ +1459,3 @@
+                                    uint64_t Address,
+                                    const void *Decoder) {
+  unsigned Value = Insn & 0x3F;
----------------
Same here.

================
Comment at: lib/Target/Mips/Disassembler/MipsDisassembler.cpp:1469
@@ +1468,3 @@
+                                  uint64_t Address,
+                                  const void *Decoder) {
+  unsigned Value = Insn & 0x7F;
----------------
Same here.

http://reviews.llvm.org/D6419