[PATCH] Add disassembler support for micromips16 andi16, addiusp, jraddiusp instructions.

[Sasa Stankovic]

================
Comment at: lib/Target/Mips/Disassembler/MipsDisassembler.cpp:313
@@ -312,1 +312,3 @@
 
+static DecodeStatus DecodeSimm9SP(MCInst &Inst, unsigned Insn,
+  uint64_t Address, const void *Decoder);
----------------
Align the parameters.

================
Comment at: lib/Target/Mips/Disassembler/MipsDisassembler.cpp:316
@@ +315,3 @@
+
+static DecodeStatus DecodeANDI16Imm(MCInst &Inst, unsigned Insn,
+  uint64_t Address, const void *Decoder);
----------------
Same here.

================
Comment at: lib/Target/Mips/Disassembler/MipsDisassembler.cpp:319
@@ +318,3 @@
+
+static DecodeStatus DecodeUIm5lsl2(MCInst &Inst, unsigned Insn,
+  uint64_t Address, const void *Decoder);
----------------
Same here (and few more cases below).

================
Comment at: lib/Target/Mips/Disassembler/MipsDisassembler.cpp:1459
@@ +1458,3 @@
+static DecodeStatus DecodeSimm9SP(MCInst &Inst, unsigned Insn,
+  uint64_t Address, const void *Decoder) {
+  Inst.addOperand(MCOperand::CreateImm(SignExtend32<11>(Insn << 2)));
----------------
For the following instructions the immediate is wrongly disassembled:

addiusp 1024
addiusp 1028
addiusp -1028
addiusp -1032

if they are assembled with llvm-mc (or gcc) and then disassembled with llvm-objdump, the result is

addiusp 0
addiusp 4
addiusp -4
addiusp -8

Please include these instructions in both assemble and disassemble tests.

================
Comment at: lib/Target/Mips/MicroMipsInstrInfo.td:11
@@ -10,2 +10,3 @@
 def uimm5_lsl2 : Operand<OtherVT> {
   let EncoderMethod = "getUImm5Lsl2Encoding";
+  let DecoderMethod = "DecodeUIm5lsl2";
----------------
Add one more 'm' in method name: DecodeUImm5lsl2

http://reviews.llvm.org/D6413