[llvm] r222821 - Update AArch64 ELF relocations to ABI 1.0
Will Newton
will.newton at linaro.org
Wed Nov 26 02:49:19 PST 2014
Author: wnewton
Date: Wed Nov 26 04:49:18 2014
New Revision: 222821
URL: http://llvm.org/viewvc/llvm-project?rev=222821&view=rev
Log:
Update AArch64 ELF relocations to ABI 1.0
This mostly entails adding relocations, however there are a couple of
changes to existing relocations:
1. R_AARCH64_NONE is defined to be zero rather than 256
R_AARCH64_NONE has been defined to be zero for a long time elsewhere
e.g. binutils and glibc since the submission of the AArch64 port in
2012 so this is required for compatibility.
2. R_AARCH64_TLSDESC_ADR_PAGE renamed to R_AARCH64_TLSDESC_ADR_PAGE21
I don't think there is any way for relocation names to leak out of LLVM
so this should not break anything.
Tested with check-all with no regressions.
Modified:
llvm/trunk/include/llvm/Support/ELFRelocs/AArch64.def
llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
llvm/trunk/test/CodeGen/AArch64/arm64-tls-dynamics.ll
llvm/trunk/test/MC/AArch64/adrp-relocation.s
llvm/trunk/test/MC/AArch64/arm64-elf-relocs.s
llvm/trunk/test/MC/AArch64/arm64-tls-relocs.s
llvm/trunk/test/MC/AArch64/inline-asm-modifiers.s
llvm/trunk/test/MC/AArch64/tls-relocs.s
llvm/trunk/test/tools/llvm-readobj/Inputs/relocs.obj.elf-aarch64
llvm/trunk/test/tools/llvm-readobj/Inputs/relocs.py
llvm/trunk/test/tools/llvm-readobj/reloc-types.test
Modified: llvm/trunk/include/llvm/Support/ELFRelocs/AArch64.def
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Support/ELFRelocs/AArch64.def?rev=222821&r1=222820&r2=222821&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Support/ELFRelocs/AArch64.def (original)
+++ llvm/trunk/include/llvm/Support/ELFRelocs/AArch64.def Wed Nov 26 04:49:18 2014
@@ -3,7 +3,8 @@
#error "ELF_RELOC must be defined"
#endif
-ELF_RELOC(R_AARCH64_NONE, 0x100)
+// ABI release 1.0
+ELF_RELOC(R_AARCH64_NONE, 0)
ELF_RELOC(R_AARCH64_ABS64, 0x101)
ELF_RELOC(R_AARCH64_ABS32, 0x102)
@@ -26,6 +27,7 @@ ELF_RELOC(R_AARCH64_MOVW_SABS_G2,
ELF_RELOC(R_AARCH64_LD_PREL_LO19, 0x111)
ELF_RELOC(R_AARCH64_ADR_PREL_LO21, 0x112)
ELF_RELOC(R_AARCH64_ADR_PREL_PG_HI21, 0x113)
+ELF_RELOC(R_AARCH64_ADR_PREL_PG_HI21_NC, 0x114)
ELF_RELOC(R_AARCH64_ADD_ABS_LO12_NC, 0x115)
ELF_RELOC(R_AARCH64_LDST8_ABS_LO12_NC, 0x116)
@@ -38,14 +40,45 @@ ELF_RELOC(R_AARCH64_LDST16_ABS_LO12_NC,
ELF_RELOC(R_AARCH64_LDST32_ABS_LO12_NC, 0x11d)
ELF_RELOC(R_AARCH64_LDST64_ABS_LO12_NC, 0x11e)
+ELF_RELOC(R_AARCH64_MOVW_PREL_G0, 0x11f)
+ELF_RELOC(R_AARCH64_MOVW_PREL_G0_NC, 0x120)
+ELF_RELOC(R_AARCH64_MOVW_PREL_G1, 0x121)
+ELF_RELOC(R_AARCH64_MOVW_PREL_G1_NC, 0x122)
+ELF_RELOC(R_AARCH64_MOVW_PREL_G2, 0x123)
+ELF_RELOC(R_AARCH64_MOVW_PREL_G2_NC, 0x124)
+ELF_RELOC(R_AARCH64_MOVW_PREL_G3, 0x125)
+
ELF_RELOC(R_AARCH64_LDST128_ABS_LO12_NC, 0x12b)
+ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G0, 0x12c)
+ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G0_NC, 0x12d)
+ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G1, 0x12e)
+ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G1_NC, 0x12f)
+ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G2, 0x130)
+ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G2_NC, 0x131)
+ELF_RELOC(R_AARCH64_MOVW_GOTOFF_G3, 0x132)
+
ELF_RELOC(R_AARCH64_GOTREL64, 0x133)
ELF_RELOC(R_AARCH64_GOTREL32, 0x134)
+ELF_RELOC(R_AARCH64_GOT_LD_PREL19, 0x135)
+ELF_RELOC(R_AARCH64_LD64_GOTOFF_LO15, 0x136)
ELF_RELOC(R_AARCH64_ADR_GOT_PAGE, 0x137)
ELF_RELOC(R_AARCH64_LD64_GOT_LO12_NC, 0x138)
+ELF_RELOC(R_AARCH64_LD64_GOTPAGE_LO15, 0x139)
+ELF_RELOC(R_AARCH64_TLSGD_ADR_PREL21, 0x200)
+ELF_RELOC(R_AARCH64_TLSGD_ADR_PAGE21, 0x201)
+ELF_RELOC(R_AARCH64_TLSGD_ADD_LO12_NC, 0x202)
+ELF_RELOC(R_AARCH64_TLSGD_MOVW_G1, 0x203)
+ELF_RELOC(R_AARCH64_TLSGD_MOVW_G0_NC, 0x204)
+
+ELF_RELOC(R_AARCH64_TLSLD_ADR_PREL21, 0x205)
+ELF_RELOC(R_AARCH64_TLSLD_ADR_PAGE21, 0x206)
+ELF_RELOC(R_AARCH64_TLSLD_ADD_LO12_NC, 0x207)
+ELF_RELOC(R_AARCH64_TLSLD_MOVW_G1, 0x208)
+ELF_RELOC(R_AARCH64_TLSLD_MOVW_G0_NC, 0x209)
+ELF_RELOC(R_AARCH64_TLSLD_LD_PREL19, 0x20a)
ELF_RELOC(R_AARCH64_TLSLD_MOVW_DTPREL_G2, 0x20b)
ELF_RELOC(R_AARCH64_TLSLD_MOVW_DTPREL_G1, 0x20c)
ELF_RELOC(R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, 0x20d)
@@ -86,12 +119,23 @@ ELF_RELOC(R_AARCH64_TLSLE_LDST32_TPREL_L
ELF_RELOC(R_AARCH64_TLSLE_LDST64_TPREL_LO12, 0x22e)
ELF_RELOC(R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC, 0x22f)
-ELF_RELOC(R_AARCH64_TLSDESC_ADR_PAGE, 0x232)
+ELF_RELOC(R_AARCH64_TLSDESC_LD_PREL19, 0x230)
+ELF_RELOC(R_AARCH64_TLSDESC_ADR_PREL21, 0x231)
+ELF_RELOC(R_AARCH64_TLSDESC_ADR_PAGE21, 0x232)
ELF_RELOC(R_AARCH64_TLSDESC_LD64_LO12_NC, 0x233)
ELF_RELOC(R_AARCH64_TLSDESC_ADD_LO12_NC, 0x234)
-
+ELF_RELOC(R_AARCH64_TLSDESC_OFF_G1, 0x235)
+ELF_RELOC(R_AARCH64_TLSDESC_OFF_G0_NC, 0x236)
+ELF_RELOC(R_AARCH64_TLSDESC_LDR, 0x237)
+ELF_RELOC(R_AARCH64_TLSDESC_ADD, 0x238)
ELF_RELOC(R_AARCH64_TLSDESC_CALL, 0x239)
+ELF_RELOC(R_AARCH64_TLSLE_LDST128_TPREL_LO12, 0x23a)
+ELF_RELOC(R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC, 0x23b)
+
+ELF_RELOC(R_AARCH64_TLSLD_LDST128_DTPREL_LO12, 0x23c)
+ELF_RELOC(R_AARCH64_TLSLD_LDST128_DTPREL_LO12_NC, 0x23d)
+
ELF_RELOC(R_AARCH64_COPY, 0x400)
ELF_RELOC(R_AARCH64_GLOB_DAT, 0x401)
ELF_RELOC(R_AARCH64_JUMP_SLOT, 0x402)
Modified: llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp?rev=222821&r1=222820&r2=222821&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp Wed Nov 26 04:49:18 2014
@@ -78,7 +78,7 @@ unsigned AArch64ELFObjectWriter::GetRelo
if (SymLoc == AArch64MCExpr::VK_GOTTPREL && !IsNC)
return ELF::R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21;
if (SymLoc == AArch64MCExpr::VK_TLSDESC && !IsNC)
- return ELF::R_AARCH64_TLSDESC_ADR_PAGE;
+ return ELF::R_AARCH64_TLSDESC_ADR_PAGE21;
llvm_unreachable("invalid symbol kind for ADRP relocation");
case AArch64::fixup_aarch64_pcrel_branch26:
return ELF::R_AARCH64_JUMP26;
Modified: llvm/trunk/test/CodeGen/AArch64/arm64-tls-dynamics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-tls-dynamics.ll?rev=222821&r1=222820&r2=222821&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-tls-dynamics.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-tls-dynamics.ll Wed Nov 26 04:49:18 2014
@@ -20,7 +20,7 @@ define i32 @test_generaldynamic() {
; CHECK: mrs x[[TP:[0-9]+]], TPIDR_EL0
; CHECK: ldr w0, [x[[TP]], x0]
-; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE
+; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21
; CHECK-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC
; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC
; CHECK-RELOC: R_AARCH64_TLSDESC_CALL
@@ -43,7 +43,7 @@ define i32* @test_generaldynamic_addr()
; CHECK: mrs [[TP:x[0-9]+]], TPIDR_EL0
; CHECK: add x0, [[TP]], x0
-; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE
+; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21
; CHECK-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC
; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC
; CHECK-RELOC: R_AARCH64_TLSDESC_CALL
@@ -73,7 +73,7 @@ define i32 @test_localdynamic() {
; CHECK: ldr w0, [x[[TPIDR]], x[[TPREL]]]
-; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE
+; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21
; CHECK-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC
; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC
; CHECK-RELOC: R_AARCH64_TLSDESC_CALL
@@ -101,7 +101,7 @@ define i32* @test_localdynamic_addr() {
; CHECK: add x0, [[TPIDR]], [[TPREL]]
-; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE
+; CHECK-RELOC: R_AARCH64_TLSDESC_ADR_PAGE21
; CHECK-RELOC: R_AARCH64_TLSDESC_ADD_LO12_NC
; CHECK-RELOC: R_AARCH64_TLSDESC_LD64_LO12_NC
; CHECK-RELOC: R_AARCH64_TLSDESC_CALL
Modified: llvm/trunk/test/MC/AArch64/adrp-relocation.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/adrp-relocation.s?rev=222821&r1=222820&r2=222821&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/adrp-relocation.s (original)
+++ llvm/trunk/test/MC/AArch64/adrp-relocation.s Wed Nov 26 04:49:18 2014
@@ -15,4 +15,4 @@ sym:
// CHECK: R_AARCH64_ADR_PREL_PG_HI21 sym
// CHECK: R_AARCH64_ADR_GOT_PAGE sym
// CHECK: R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 sym
-// CHECK: R_AARCH64_TLSDESC_ADR_PAGE sym
+// CHECK: R_AARCH64_TLSDESC_ADR_PAGE21 sym
Modified: llvm/trunk/test/MC/AArch64/arm64-elf-relocs.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/arm64-elf-relocs.s?rev=222821&r1=222820&r2=222821&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/arm64-elf-relocs.s (original)
+++ llvm/trunk/test/MC/AArch64/arm64-elf-relocs.s Wed Nov 26 04:49:18 2014
@@ -77,7 +77,7 @@
adrp x2, :tlsdesc:sym
// CHECK: adrp x2, :tlsdesc:sym
-// CHECK-OBJ: 58 R_AARCH64_TLSDESC_ADR_PAGE sym
+// CHECK-OBJ: 58 R_AARCH64_TLSDESC_ADR_PAGE21 sym
// LLVM is not competent enough to do this relocation because the
// page boundary could occur anywhere after linking. A relocation
Modified: llvm/trunk/test/MC/AArch64/arm64-tls-relocs.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/arm64-tls-relocs.s?rev=222821&r1=222820&r2=222821&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/arm64-tls-relocs.s (original)
+++ llvm/trunk/test/MC/AArch64/arm64-tls-relocs.s Wed Nov 26 04:49:18 2014
@@ -304,7 +304,7 @@
// CHECK: blr x3 // encoding: [0x60,0x00,0x3f,0xd6]
-// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_ADR_PAGE [[VARSYM]]
+// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_ADR_PAGE21 [[VARSYM]]
// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_LD64_LO12_NC [[VARSYM]]
// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_ADD_LO12_NC [[VARSYM]]
// CHECK-ELF-NEXT: {{0x[0-9A-F]+}} R_AARCH64_TLSDESC_CALL [[VARSYM]]
Modified: llvm/trunk/test/MC/AArch64/inline-asm-modifiers.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/inline-asm-modifiers.s?rev=222821&r1=222820&r2=222821&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/inline-asm-modifiers.s (original)
+++ llvm/trunk/test/MC/AArch64/inline-asm-modifiers.s Wed Nov 26 04:49:18 2014
@@ -73,7 +73,7 @@ test_inline_modifier_A:
.size test_inline_modifier_A, .Ltmp2-test_inline_modifier_A
// CHECK: R_AARCH64_ADR_PREL_PG_HI21 var_simple
// CHECK: R_AARCH64_ADR_GOT_PAGE var_got
-// CHECK: R_AARCH64_TLSDESC_ADR_PAGE var_tlsgd
+// CHECK: R_AARCH64_TLSDESC_ADR_PAGE21 var_tlsgd
// CHECK: R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 var_tlsie
.globl test_inline_modifier_wx
Modified: llvm/trunk/test/MC/AArch64/tls-relocs.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/tls-relocs.s?rev=222821&r1=222820&r2=222821&view=diff
==============================================================================
--- llvm/trunk/test/MC/AArch64/tls-relocs.s (original)
+++ llvm/trunk/test/MC/AArch64/tls-relocs.s Wed Nov 26 04:49:18 2014
@@ -391,7 +391,7 @@
// CHECK: // fixup A - offset: 0, value: var, kind: fixup_aarch64_tlsdesc_call
// CHECK: blr x3 // encoding: [0x60,0x00,0x3f,0xd6]
-// CHECK-ELF-NEXT: 0x104 R_AARCH64_TLSDESC_ADR_PAGE [[VARSYM]]
+// CHECK-ELF-NEXT: 0x104 R_AARCH64_TLSDESC_ADR_PAGE21 [[VARSYM]]
// CHECK-ELF-NEXT: 0x108 R_AARCH64_TLSDESC_LD64_LO12_NC [[VARSYM]]
// CHECK-ELF-NEXT: 0x10C R_AARCH64_TLSDESC_ADD_LO12_NC [[VARSYM]]
// CHECK-ELF-NEXT: 0x110 R_AARCH64_TLSDESC_CALL [[VARSYM]]
Modified: llvm/trunk/test/tools/llvm-readobj/Inputs/relocs.obj.elf-aarch64
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-readobj/Inputs/relocs.obj.elf-aarch64?rev=222821&r1=222820&r2=222821&view=diff
==============================================================================
Binary files llvm/trunk/test/tools/llvm-readobj/Inputs/relocs.obj.elf-aarch64 (original) and llvm/trunk/test/tools/llvm-readobj/Inputs/relocs.obj.elf-aarch64 Wed Nov 26 04:49:18 2014 differ
Modified: llvm/trunk/test/tools/llvm-readobj/Inputs/relocs.py
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-readobj/Inputs/relocs.py?rev=222821&r1=222820&r2=222821&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-readobj/Inputs/relocs.py (original)
+++ llvm/trunk/test/tools/llvm-readobj/Inputs/relocs.py Wed Nov 26 04:49:18 2014
@@ -591,7 +591,7 @@ class Relocs_Elf_PPC64(Enum):
R_PPC64_TLSLD = 108
class Relocs_Elf_AArch64(Enum):
- R_AARCH64_NONE = 0x100
+ R_AARCH64_NONE = 0
R_AARCH64_ABS64 = 0x101
R_AARCH64_ABS32 = 0x102
R_AARCH64_ABS16 = 0x103
@@ -611,6 +611,7 @@ class Relocs_Elf_AArch64(Enum):
R_AARCH64_LD_PREL_LO19 = 0x111
R_AARCH64_ADR_PREL_LO21 = 0x112
R_AARCH64_ADR_PREL_PG_HI21 = 0x113
+ R_AARCH64_ADR_PREL_PG_HI21_NC = 0x114
R_AARCH64_ADD_ABS_LO12_NC = 0x115
R_AARCH64_LDST8_ABS_LO12_NC = 0x116
R_AARCH64_TSTBR14 = 0x117
@@ -620,11 +621,39 @@ class Relocs_Elf_AArch64(Enum):
R_AARCH64_LDST16_ABS_LO12_NC = 0x11c
R_AARCH64_LDST32_ABS_LO12_NC = 0x11d
R_AARCH64_LDST64_ABS_LO12_NC = 0x11e
+ R_AARCH64_MOVW_PREL_G0 = 0x11f
+ R_AARCH64_MOVW_PREL_G0_NC = 0x120
+ R_AARCH64_MOVW_PREL_G1 = 0x121
+ R_AARCH64_MOVW_PREL_G1_NC = 0x122
+ R_AARCH64_MOVW_PREL_G2 = 0x123
+ R_AARCH64_MOVW_PREL_G2_NC = 0x124
+ R_AARCH64_MOVW_PREL_G3 = 0x125
R_AARCH64_LDST128_ABS_LO12_NC = 0x12b
+ R_AARCH64_MOVW_GOTOFF_G0 = 0x12c
+ R_AARCH64_MOVW_GOTOFF_G0_NC = 0x12d
+ R_AARCH64_MOVW_GOTOFF_G1 = 0x12e
+ R_AARCH64_MOVW_GOTOFF_G1_NC = 0x12f
+ R_AARCH64_MOVW_GOTOFF_G2 = 0x130
+ R_AARCH64_MOVW_GOTOFF_G2_NC = 0x131
+ R_AARCH64_MOVW_GOTOFF_G3 = 0x132
R_AARCH64_GOTREL64 = 0x133
R_AARCH64_GOTREL32 = 0x134
+ R_AARCH64_GOT_LD_PREL19 = 0x135
+ R_AARCH64_LD64_GOTOFF_LO15 = 0x136
R_AARCH64_ADR_GOT_PAGE = 0x137
R_AARCH64_LD64_GOT_LO12_NC = 0x138
+ R_AARCH64_LD64_GOTPAGE_LO15 = 0x139
+ R_AARCH64_TLSGD_ADR_PREL21 = 0x200
+ R_AARCH64_TLSGD_ADR_PAGE21 = 0x201
+ R_AARCH64_TLSGD_ADD_LO12_NC = 0x202
+ R_AARCH64_TLSGD_MOVW_G1 = 0x203
+ R_AARCH64_TLSGD_MOVW_G0_NC = 0x204
+ R_AARCH64_TLSLD_ADR_PREL21 = 0x205
+ R_AARCH64_TLSLD_ADR_PAGE21 = 0x206
+ R_AARCH64_TLSLD_ADD_LO12_NC = 0x207
+ R_AARCH64_TLSLD_MOVW_G1 = 0x208
+ R_AARCH64_TLSLD_MOVW_G0_NC = 0x209
+ R_AARCH64_TLSLD_LD_PREL19 = 0x20a
R_AARCH64_TLSLD_MOVW_DTPREL_G2 = 0x20b
R_AARCH64_TLSLD_MOVW_DTPREL_G1 = 0x20c
R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC = 0x20d
@@ -662,10 +691,20 @@ class Relocs_Elf_AArch64(Enum):
R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC = 0x22d
R_AARCH64_TLSLE_LDST64_TPREL_LO12 = 0x22e
R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC = 0x22f
- R_AARCH64_TLSDESC_ADR_PAGE = 0x232
+ R_AARCH64_TLSDESC_LD_PREL19 = 0x230
+ R_AARCH64_TLSDESC_ADR_PREL21 = 0x231
+ R_AARCH64_TLSDESC_ADR_PAGE21 = 0x232
R_AARCH64_TLSDESC_LD64_LO12_NC = 0x233
R_AARCH64_TLSDESC_ADD_LO12_NC = 0x234
+ R_AARCH64_TLSDESC_OFF_G1 = 0x235
+ R_AARCH64_TLSDESC_OFF_G0_NC = 0x236
+ R_AARCH64_TLSDESC_LDR = 0x237
+ R_AARCH64_TLSDESC_ADD = 0x238
R_AARCH64_TLSDESC_CALL = 0x239
+ R_AARCH64_TLSLE_LDST128_TPREL_LO12 = 0x23a
+ R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC = 0x23b
+ R_AARCH64_TLSLD_LDST128_DTPREL_LO12 = 0x23c
+ R_AARCH64_TLSLD_LDST128_DTPREL_LO12_NC = 0x23d
R_AARCH64_COPY = 0x400
R_AARCH64_GLOB_DAT = 0x401
R_AARCH64_JUMP_SLOT = 0x402
Modified: llvm/trunk/test/tools/llvm-readobj/reloc-types.test
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-readobj/reloc-types.test?rev=222821&r1=222820&r2=222821&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-readobj/reloc-types.test (original)
+++ llvm/trunk/test/tools/llvm-readobj/reloc-types.test Wed Nov 26 04:49:18 2014
@@ -149,7 +149,7 @@ ELF-PPC64: Type: R_PPC64_GOT_TPREL16_HA
ELF-PPC64: Type: R_PPC64_TLSGD (107)
ELF-PPC64: Type: R_PPC64_TLSLD (108)
-ELF-AARCH64: Type: R_AARCH64_NONE (256)
+ELF-AARCH64: Type: R_AARCH64_NONE (0)
ELF-AARCH64: Type: R_AARCH64_ABS64 (257)
ELF-AARCH64: Type: R_AARCH64_ABS32 (258)
ELF-AARCH64: Type: R_AARCH64_ABS16 (259)
@@ -169,6 +169,7 @@ ELF-AARCH64: Type: R_AARCH64_MOVW_SABS_G
ELF-AARCH64: Type: R_AARCH64_LD_PREL_LO19 (273)
ELF-AARCH64: Type: R_AARCH64_ADR_PREL_LO21 (274)
ELF-AARCH64: Type: R_AARCH64_ADR_PREL_PG_HI21 (275)
+ELF-AARCH64: Type: R_AARCH64_ADR_PREL_PG_HI21_NC (276)
ELF-AARCH64: Type: R_AARCH64_ADD_ABS_LO12_NC (277)
ELF-AARCH64: Type: R_AARCH64_LDST8_ABS_LO12_NC (278)
ELF-AARCH64: Type: R_AARCH64_TSTBR14 (279)
@@ -178,11 +179,39 @@ ELF-AARCH64: Type: R_AARCH64_CALL26 (283
ELF-AARCH64: Type: R_AARCH64_LDST16_ABS_LO12_NC (284)
ELF-AARCH64: Type: R_AARCH64_LDST32_ABS_LO12_NC (285)
ELF-AARCH64: Type: R_AARCH64_LDST64_ABS_LO12_NC (286)
+ELF-AARCH64: Type: R_AARCH64_MOVW_PREL_G0 (287)
+ELF-AARCH64: Type: R_AARCH64_MOVW_PREL_G0_NC (288)
+ELF-AARCH64: Type: R_AARCH64_MOVW_PREL_G1 (289)
+ELF-AARCH64: Type: R_AARCH64_MOVW_PREL_G1_NC (290)
+ELF-AARCH64: Type: R_AARCH64_MOVW_PREL_G2 (291)
+ELF-AARCH64: Type: R_AARCH64_MOVW_PREL_G2_NC (292)
+ELF-AARCH64: Type: R_AARCH64_MOVW_PREL_G3 (293)
ELF-AARCH64: Type: R_AARCH64_LDST128_ABS_LO12_NC (299)
+ELF-AARCH64: Type: R_AARCH64_MOVW_GOTOFF_G0 (300)
+ELF-AARCH64: Type: R_AARCH64_MOVW_GOTOFF_G0_NC (301)
+ELF-AARCH64: Type: R_AARCH64_MOVW_GOTOFF_G1 (302)
+ELF-AARCH64: Type: R_AARCH64_MOVW_GOTOFF_G1_NC (303)
+ELF-AARCH64: Type: R_AARCH64_MOVW_GOTOFF_G2 (304)
+ELF-AARCH64: Type: R_AARCH64_MOVW_GOTOFF_G2_NC (305)
+ELF-AARCH64: Type: R_AARCH64_MOVW_GOTOFF_G3 (306)
ELF-AARCH64: Type: R_AARCH64_GOTREL64 (307)
ELF-AARCH64: Type: R_AARCH64_GOTREL32 (308)
+ELF-AARCH64: Type: R_AARCH64_GOT_LD_PREL19 (309)
+ELF-AARCH64: Type: R_AARCH64_LD64_GOTOFF_LO15 (310)
ELF-AARCH64: Type: R_AARCH64_ADR_GOT_PAGE (311)
ELF-AARCH64: Type: R_AARCH64_LD64_GOT_LO12_NC (312)
+ELF-AARCH64: Type: R_AARCH64_LD64_GOTPAGE_LO15 (313)
+ELF-AARCH64: Type: R_AARCH64_TLSGD_ADR_PREL21 (512)
+ELF-AARCH64: Type: R_AARCH64_TLSGD_ADR_PAGE21 (513)
+ELF-AARCH64: Type: R_AARCH64_TLSGD_ADD_LO12_NC (514)
+ELF-AARCH64: Type: R_AARCH64_TLSGD_MOVW_G1 (515)
+ELF-AARCH64: Type: R_AARCH64_TLSGD_MOVW_G0_NC (516)
+ELF-AARCH64: Type: R_AARCH64_TLSLD_ADR_PREL21 (517)
+ELF-AARCH64: Type: R_AARCH64_TLSLD_ADR_PAGE21 (518)
+ELF-AARCH64: Type: R_AARCH64_TLSLD_ADD_LO12_NC (519)
+ELF-AARCH64: Type: R_AARCH64_TLSLD_MOVW_G1 (520)
+ELF-AARCH64: Type: R_AARCH64_TLSLD_MOVW_G0_NC (521)
+ELF-AARCH64: Type: R_AARCH64_TLSLD_LD_PREL19 (522)
ELF-AARCH64: Type: R_AARCH64_TLSLD_MOVW_DTPREL_G2 (523)
ELF-AARCH64: Type: R_AARCH64_TLSLD_MOVW_DTPREL_G1 (524)
ELF-AARCH64: Type: R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC (525)
@@ -220,10 +249,20 @@ ELF-AARCH64: Type: R_AARCH64_TLSLE_LDST3
ELF-AARCH64: Type: R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC (557)
ELF-AARCH64: Type: R_AARCH64_TLSLE_LDST64_TPREL_LO12 (558)
ELF-AARCH64: Type: R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC (559)
-ELF-AARCH64: Type: R_AARCH64_TLSDESC_ADR_PAGE (562)
+ELF-AARCH64: Type: R_AARCH64_TLSDESC_LD_PREL19 (560)
+ELF-AARCH64: Type: R_AARCH64_TLSDESC_ADR_PREL21 (561)
+ELF-AARCH64: Type: R_AARCH64_TLSDESC_ADR_PAGE21 (562)
ELF-AARCH64: Type: R_AARCH64_TLSDESC_LD64_LO12_NC (563)
ELF-AARCH64: Type: R_AARCH64_TLSDESC_ADD_LO12_NC (564)
+ELF-AARCH64: Type: R_AARCH64_TLSDESC_OFF_G1 (565)
+ELF-AARCH64: Type: R_AARCH64_TLSDESC_OFF_G0_NC (566)
+ELF-AARCH64: Type: R_AARCH64_TLSDESC_LDR (567)
+ELF-AARCH64: Type: R_AARCH64_TLSDESC_ADD (568)
ELF-AARCH64: Type: R_AARCH64_TLSDESC_CALL (569)
+ELF-AARCH64: Type: R_AARCH64_TLSLE_LDST128_TPREL_LO12 (570)
+ELF-AARCH64: Type: R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC (571)
+ELF-AARCH64: Type: R_AARCH64_TLSLD_LDST128_DTPREL_LO12 (572)
+ELF-AARCH64: Type: R_AARCH64_TLSLD_LDST128_DTPREL_LO12_NC (573)
ELF-AARCH64: Type: R_AARCH64_COPY (1024)
ELF-AARCH64: Type: R_AARCH64_GLOB_DAT (1025)
ELF-AARCH64: Type: R_AARCH64_JUMP_SLOT (1026)
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