[PATCH] [mips][microMIPS] Implement disassembler support for 16-bit instructions

[Sasa Stankovic]

LGTM, with 3 changes.

================
Comment at: lib/Target/Mips/Disassembler/MipsDisassembler.cpp:708
@@ -707,1 +707,3 @@
 
+/// Read two bytes from the ArrayRef and return 16 bit halfword sorted
+/// according to the given endianess
----------------
Add '.' at the end.

================
Comment at: lib/Target/Mips/Disassembler/MipsDisassembler.cpp:711
@@ +710,3 @@
+static DecodeStatus readInstruction16(ArrayRef<uint8_t> Bytes,
+                                      uint64_t Address,
+                                      uint64_t &Size,
----------------
You can place all parameters on 3 lines:

static DecodeStatus readInstruction16(ArrayRef<uint8_t> Bytes, uint64_t Address,
                                      uint64_t &Size, uint32_t &Insn,
                                      bool IsBigEndian) {

================
Comment at: lib/Target/Mips/Disassembler/MipsDisassembler.cpp:744
@@ +743,3 @@
+  // are placed at lower addresses in the instruction stream).
+  //
+  // MicroMIPS byte ordering:
----------------
microMIPS

http://reviews.llvm.org/D6149