[llvm] r222623 - InstCombine: Propagate exact for (sdiv -X, C) -> (sdiv X, -C)
David Majnemer
david.majnemer at gmail.com
Sat Nov 22 12:00:34 PST 2014
Author: majnemer
Date: Sat Nov 22 14:00:34 2014
New Revision: 222623
URL: http://llvm.org/viewvc/llvm-project?rev=222623&view=rev
Log:
InstCombine: Propagate exact for (sdiv -X, C) -> (sdiv X, -C)
Modified:
llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
llvm/trunk/test/Transforms/InstCombine/div.ll
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp?rev=222623&r1=222622&r2=222623&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp Sat Nov 22 14:00:34 2014
@@ -1082,10 +1082,12 @@ Instruction *InstCombiner::visitSDiv(Bin
return new ZExtInst(Builder->CreateICmpEQ(Op0, Op1), I.getType());
// -X/C --> X/-C provided the negation doesn't overflow.
- if (SubOperator *Sub = dyn_cast<SubOperator>(Op0))
- if (match(Sub->getOperand(0), m_Zero()) && Sub->hasNoSignedWrap())
- return BinaryOperator::CreateSDiv(Sub->getOperand(1),
- ConstantExpr::getNeg(RHS));
+ Value *X;
+ if (match(Op0, m_NSWSub(m_Zero(), m_Value(X)))) {
+ auto *BO = BinaryOperator::CreateSDiv(X, ConstantExpr::getNeg(RHS));
+ BO->setIsExact(I.isExact());
+ return BO;
+ }
}
// If the sign bits of both operands are zero (i.e. we can prove they are
Modified: llvm/trunk/test/Transforms/InstCombine/div.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/div.ll?rev=222623&r1=222622&r2=222623&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/div.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/div.ll Sat Nov 22 14:00:34 2014
@@ -295,3 +295,12 @@ define <2 x i64> @test33(<2 x i64> %x) n
; CHECK-NEXT: udiv exact <2 x i64> %x, <i64 192, i64 192>
; CHECK-NEXT: ret <2 x i64>
}
+
+define <2 x i64> @test34(<2 x i64> %x) nounwind {
+ %neg = sub nsw <2 x i64> zeroinitializer, %x
+ %div = sdiv exact <2 x i64> %neg, <i64 3, i64 4>
+ ret <2 x i64> %div
+; CHECK-LABEL: @test34(
+; CHECK-NEXT: sdiv exact <2 x i64> %x, <i64 -3, i64 -4>
+; CHECK-NEXT: ret <2 x i64>
+}
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