[PATCH] [AArch64] Combine multiple FDIVs with the same divisor

Hao Liu Hao.Liu at arm.com
Thu Nov 20 19:49:02 PST 2014


>>! In D6334#9, @spatel wrote:
> Just chiming in for the target-independent path: x86 needs this too. 
> 
> I don't understand the expense argument cited here:
> http://llvm.org/bugs/show_bug.cgi?id=16218#c4
> 
> Is checking uses in InstCombine more expensive than in DAGCombine? This transform is only firing with fast FP-math. Does that make it any more tolerable?

Hi Sanjay,

I think it is a target specific problem. Some target may not want such combine.
E.g. we combine "N FDIVs" into "1 FDIVs and N FMULs". One shortcoming is that there is one more instruction. Also, different target may have different costs for FDIV and FMUL. Even though we can suppose that a FMUL is fater than a FDIV, but maybe "2 FDIV" is faster than "1 FDIV and 2 FMUL".

So I think it's better to be solved in the backend.

Thanks,
-Hao

http://reviews.llvm.org/D6334






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