[llvm] r222499 - SROA: The alloca type isn't a candidate promotion type for vectors
David Majnemer
david.majnemer at gmail.com
Thu Nov 20 18:34:55 PST 2014
Author: majnemer
Date: Thu Nov 20 20:34:55 2014
New Revision: 222499
URL: http://llvm.org/viewvc/llvm-project?rev=222499&view=rev
Log:
SROA: The alloca type isn't a candidate promotion type for vectors
The alloca's type is irrelevant, only those types which are used in a
load or store of the exact size of the slice should be considered.
This manifested as an assertion failure when we compared the various
types: we had a size mismatch.
This fixes PR21480.
Modified:
llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp
llvm/trunk/lib/Transforms/Scalar/SROA.cpp
llvm/trunk/test/Transforms/SROA/vector-promotion.ll
Modified: llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp?rev=222499&r1=222498&r2=222499&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/Reassociate.cpp Thu Nov 20 20:34:55 2014
@@ -394,6 +394,13 @@ static BinaryOperator *LowerNegateToMult
BinaryOperator *Res = CreateMul(Neg->getOperand(1), NegOne, "", Neg, Neg);
Neg->setOperand(1, Constant::getNullValue(Ty)); // Drop use of op.
Res->takeName(Neg);
+ if (Ty->isIntegerTy()) {
+ bool NSW = cast<BinaryOperator>(Neg)->hasNoSignedWrap();
+ bool NUW = cast<BinaryOperator>(Neg)->hasNoUnsignedWrap();
+ if (NSW || NUW)
+ Res->setHasNoSignedWrap(true);
+ Res->setHasNoUnsignedWrap(NUW);
+ }
Neg->replaceAllUsesWith(Res);
Res->setDebugLoc(Neg->getDebugLoc());
return Res;
Modified: llvm/trunk/lib/Transforms/Scalar/SROA.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/SROA.cpp?rev=222499&r1=222498&r2=222499&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/SROA.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/SROA.cpp Thu Nov 20 20:34:55 2014
@@ -1691,7 +1691,7 @@ isVectorPromotionViableForSlice(const Da
/// don't want to do the rewrites unless we are confident that the result will
/// be promotable, so we have an early test here.
static VectorType *
-isVectorPromotionViable(const DataLayout &DL, Type *AllocaTy,
+isVectorPromotionViable(const DataLayout &DL,
uint64_t SliceBeginOffset, uint64_t SliceEndOffset,
AllocaSlices::const_range Slices,
ArrayRef<AllocaSlices::iterator> SplitUses) {
@@ -1709,7 +1709,6 @@ isVectorPromotionViable(const DataLayout
HaveCommonEltTy = false;
}
};
- CheckCandidateType(AllocaTy);
// Consider any loads or stores that are the exact size of the slice.
for (const auto &S : Slices)
if (S.beginOffset() == SliceBeginOffset &&
@@ -3213,7 +3212,7 @@ bool SROA::rewritePartition(AllocaInst &
VectorType *VecTy =
IsIntegerPromotable
? nullptr
- : isVectorPromotionViable(*DL, SliceTy, BeginOffset, EndOffset,
+ : isVectorPromotionViable(*DL, BeginOffset, EndOffset,
AllocaSlices::const_range(B, E), SplitUses);
if (VecTy)
SliceTy = VecTy;
Modified: llvm/trunk/test/Transforms/SROA/vector-promotion.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/SROA/vector-promotion.ll?rev=222499&r1=222498&r2=222499&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/SROA/vector-promotion.ll (original)
+++ llvm/trunk/test/Transforms/SROA/vector-promotion.ll Thu Nov 20 20:34:55 2014
@@ -604,3 +604,22 @@ entry:
ret <2 x float> %result
; CHECK-NEXT: ret <2 x float> %[[V4]]
}
+
+define <4 x float> @test12() {
+; CHECK-LABEL: @test12(
+ %a = alloca <3 x i32>, align 16
+; CHECK-NOT: alloca
+
+ %cast1 = bitcast <3 x i32>* %a to <4 x i32>*
+ store <4 x i32> undef, <4 x i32>* %cast1, align 16
+; CHECK-NOT: store
+
+ %cast2 = bitcast <3 x i32>* %a to <3 x float>*
+ %cast3 = bitcast <3 x float>* %cast2 to <4 x float>*
+ %vec = load <4 x float>* %cast3
+; CHECK-NOT: load
+
+; CHECK: %[[ret:.*]] = bitcast <4 x i32> undef to <4 x float>
+; CHECK-NEXT: ret <4 x float> %[[ret]]
+ ret <4 x float> %vec
+}
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